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# Senior FPGA Engineer - Compute Architecture

- **Company:** Redline Group
- **Location:** Oxford, UK
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Board Bringup, Computing Platforms, Boolean Algebra, C++ (Programming Language), Computer Engineering, Software Debugging, Logic Synthesis of Circuits, Digital Technology, Ethernet, Field-Programmable Gate Array (FPGA), Hardware Description Language, Joint Test Action (IEEE Standards), Python (Programming Language), MATLAB, PCI Express, Systems Architecture, System on a Chip, Tcl (Programming Language), Toolchain, VHSIC Hardware Description Language (VHDL), Vivado, Application Specific Integrated Circuits, Hardware Acceleration, Hardware Debugging
- **Published:** August 26, 2026
- **Apply:** https://www.totaljobs.com/job/senior-fpga-engineer/redline-group-ltd-job107902206

## About the Role

Key skills required for the Senior FPGA Engineer - Compute Architecture & Hardware Acceleration role:

 * Degree in Electrical Engineering, Computer Engineering or a related discipline
 * Demonstrable experience of FPGA digital design experience developing complex, high-speed digital systems
 * Strong HDL expertise with a proven ability to develop custom RTL from scratch
 * Experience with FPGA SoC platforms, including practical knowledge of processor-side development and PS/PL architectures such as Zynq
 * Proven ability to translate mathematical or algorithmic models into hardware accelerators using fixed-point arithmetic and bit-accurate modelling techniques
 * Strong understanding of timing closure, clock domain crossing (CDC) and advanced digital design principles
 * Experience with Xilinx Vivado, Vitis and TCL scripting toolchains
 * Familiarity with hardware debugging tools including oscilloscopes, logic analysers, JTAG debuggers and signal generators

## Description

Excellent opportunity for a Senior FPGA Engineer - Compute Architecture & Hardware Acceleration to join an innovative technology business on a hybrid basis, with time spent at their Oxford site, helping develop next-generation probabilistic computing platforms and advanced hardware acceleration solutions. This role will require expertise in FPGA design, algorithm implementation, and high-speed digital systems development., * Translate complex probabilistic algorithms from Python, C++, MATLAB and pseudocode into highly pipelined, resource-efficient FPGA RTL designs

 * Design and implement custom digital logic in VHDL from scratch where vendor IP is unsuitable, introduces latency or creates bottlenecks
 * Architect and integrate high-speed data acquisition pipelines utilising ultra-fast ADCs, PCIe, high-speed Ethernet and transceiver technologies
 * Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions
 * Develop robust verification environments, perform hardware bring-up activities and optimise timing, power and resource utilisation across multiple clock domains


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