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# Senior ASIC RTL Integration and Netlisting Engineer

- **Company:** NVIDIA Ltd.
- **Location:** Austin, TX, United States
- **Experience:** Expert
- **Salary:** $168,000.0 - $310,500.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Computer Engineering, Cursor (Graphical User Interface Elements), Logic Synthesis of Circuits, Microprocessors, Electronic Design Automation, Python (Programming Language), Tcl (Programming Language), Scripting, Graphics Processing Unit (GPU), Application Specific Integrated Circuits, Physical Design
- **Published:** May 13, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=0e54fd2666bd7805

## About the Role

Do you have experience in SoC?, * BS (or equivalent experience) in Electrical or Computer Engineering with 8+ years' experience or MS (or equivalent experience) with 5+ years' experience in RTL integration and netlisting domains.

 * Strong understanding of RTL and RTL hierarchy and associated infrastructures
 * Hands on experience with logic synthesis and associated verification such as equivalence checking
 * Background in gate level netlist verification and completeness with respect to power, testability, etc
 * Expertise and in-depth knowledge of industry standard EDA tools

Ways to stand out from the crowd:

 * Expertise in understanding on clock-domains, async interfaces and MTBF analysis
 * Solid understanding of Physical Design flows, design constraints, timing and power convergence
 * Proficiency in programming/scripting languages (Python, TCL etc) and/or AI tools (Cursor, Copilot, etc)

## Description

* You will drive physical design integration and implementation of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level
 * Drive RTL integration, synthesis, along with all physical netlist deliverables across various milestones
 * Drive formal equivalence checking, netlist quality checks, asynchronous checking including clock domain crossing checks and MTBF analysis, etc.


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