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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # HBM Datapath Architect - **Company:** Micron's People Organization - **Location:** Richardson, TX, United States - **Experience:** Experienced - **Salary:** $146,000.0 - $297,000.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Computer Engineering, Dynamic Random-Access Memory, Signal Integrity, Static Timing Analysis, Data Streaming, Microsoft Power Automate, Low Latency - **Published:** August 28, 2026 - **Apply:** https://find.jobs/jobs-near-me/apply/ats-redirect/?id=2943305443-2 ## About the Role * Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 7+ years of relevant industry experience, or a Master's degree with 5+ years of relevant industry experience. * 3 + years of experience in high speed digital datapath design (memory, SerDes, or SoC datapath). * 3+ years of hands on experience with digital schematic build, RTL, or mixed signal datapath implementations., * Strong understanding of HBM/DRAM architectures, including read/write data flow, timing, and multi channel operation. * Working knowledge of layout and floorplanning considerations for high speed datapath. * Experience with static timing analysis (STA) and timing closure methodologies. * Familiarity with advanced process node challenges related to signal integrity, skew control, and power optimization. ## Description We are seeking a highly motivated HBM Datapath Architect to architect, design, and optimize high speed data paths for next generation High Bandwidth Memory (HBM) products! This role focuses on logic die and core die datapath circuitry, enabling industry leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions. The ideal candidate will work closely with design, PHY, ECC, verification, layout, and system teams to deliver robust datapath designs from concept through silicon bring up and production. Responsibilities will include, but are not limited to: * Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic * Develop high speed, low latency datapath circuits supporting multi channel HBM architectures and wide internal buses * Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes * Design and integrate data reliability features, including parity, ECC hooks, lane redundancy, and remapping mechanisms * Collaborate with multi-functional teams to translate specifications into robust micro architectures * Collaborate with PHY, DFT, verification, and layout teams to ensure accurate functionality, testability, and manufacturability * Drive schematic level and RTL level datapath implementations, including clocking, gating, and reset strategies * Contribute to design reviews, documentation, and technical mentoring across HBM programs * Demonstrate proficiency in using AI-enabled tools (e.g., Microsoft Copilot and other approved AI solutions) to improve productivity, streamline workflows, analyze information, and accelerate problem solving. ## Related Videos - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Angular Signals: what's all the fuss about?](https://www.wearedevelopers.com/videos/684-angular-signals-what-s-all-the-fuss-about) - [Python-Based Data Streaming Pipelines Within Minutes](https://www.wearedevelopers.com/videos/1233-python-based-data-streaming-pipelines-within-minutes) - [Swapping Low Latency Data Storage Under High Load](https://www.wearedevelopers.com/videos/746-swapping-low-latency-data-storage-under-high-load) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Robust AIGC Provenance with Invisible Watermarking](https://www.wearedevelopers.com/videos/100222-robust-aigc-provenance-with-invisible-watermarking) ## Related Articles - [Everything a Developer Needs to Know About MCP with Neo4j](https://www.wearedevelopers.com/magazine/604-everything-a-developer-needs-to-know-about-mcp-with-neo4j) - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [Top 6 Hackathons for Developers in 2023](https://www.wearedevelopers.com/magazine/263-top-6-hackathons-for-developers-in-2023) - [Data Science & more: The Lopez dilemma](https://www.wearedevelopers.com/magazine/10-data-science-more-the-lopez-dilemma) - [Résumé-Driven Development: How IT trends affect the job market for software developers](https://www.wearedevelopers.com/magazine/59-resume-driven-development-how-it-trends-affect-the-job-market-for-software-developers) - [Dev Digest 212: WebMCP or MCP, What is DevRel, AI's 10% Productivity Boost, and a 49MB Web Page…](https://www.wearedevelopers.com/magazine/717-dev-digest-212-webmcp-or-mcp-what-is-devrel-ai-s-10-productivity-boost-and-a-49mb-web-page)