> Markdown version of [/jobs/ext/2279317-sr-staff-engineer-digital-design-verification-job-in-austin](https://www.wearedevelopers.com/jobs/ext/2279317-sr-staff-engineer-digital-design-verification-job-in-austin). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Sr. Staff Engineer - Digital Design Verification job in Austin - **Company:** Ambiq Micro, Inc - **Location:** Austin, TX, United States - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** C++ (Programming Language), Code Coverage, Software Debugging, Logic Synthesis of Circuits, Microprocessors, Perl (Programming Language), Make (Software), Python (Programming Language), Reduced Instruction Set Computing, Subsystems, SystemVerilog, Verilog - **Published:** August 28, 2026 - **Apply:** https://jobs.diversity.com/career/2469816/sr-staff-engineer-digital-design-verification-texas-tx-austin ## About the Role We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency., * BSEE or MSEE with 8-12 years of hands-on digital design verification experience * Proven track record of multiple tape-outs with silicon functioning to specification * Strong experience in block-level, sub-system, and full-chip SoC verification * Ability to define and manage verification deliverables, milestones, and schedules * Proactively identify verification risks and implement mitigation strategies * Experience working with complex SoCs integrating multiple 3rd-party IPs and VIPs * Strong collaboration skills to work effectively with design, architecture, and software teams * Excellent communication skills for reporting status, issues, and progress to stakeholders Technical Skills * Design Verification: + SystemVerilog, UVM, Verilog + Functional and code coverage methodologies + Constrained-random verification and scoreboarding * SoC & Software-Based Verification: + C/C++ based verification in SoC environments (required) + Experience with processor-based systems (ARM and/or RISC-V preferred) * Architectures & Protocols: + ARM or RISC-V processor-based SoCs + AMBA protocols (AXI, AHB, APB) + DMA, flow control, and standard serial interfaces * Scripting & Automation: + Python, Perl, Makefile * Low Power (Digital): + Experience verifying low-power digital architectures and features is highly desirable Preferred Experience * Security IPs (Crypto, OTP) * DSP and compute-heavy digital subsystems * High-performance or low-power SoC architectures * Edge AI / ML workload enablement **Must be currently authorized to work in the United States for any employer. ## Description You will be responsible for verifying complex digital designs, including Systems-on-Chip (SoCs) with multiple CPUs, digital signal processors, security hardware, interconnects, and peripheral logic supporting IoT and edge-compute applications. The ideal candidate is a self-starter who takes full ownership of verification efforts and consistently delivers high-quality, production-ready silicon., * Own and execute end-to-end digital verification at block, sub-system, and full-chip (SoC) levels * Develop detailed verification plans aligned with architecture and design specifications * Perform SoC-level verification using full-chip simulation and regression environments * Architect and implement scalable, reusable UVM-based testbenches using SystemVerilog * Develop comprehensive test scenarios, stimulus, monitors, and checkers to achieve robust functional coverage * Drive constrained-random and directed testing, including scoreboarding and self-checking mechanisms * Develop and maintain C/C++ based verification libraries and tests for SoC-level validation * Automate verification flows for regressions, coverage collection, and results reporting * Define, track, and close functional and code coverage goals * Utilize advanced debugging methodologies to isolate and resolve complex design and verification issues * Perform root-cause analysis and collaborate closely with design teams to drive fixes * Ensure verification quality meets or exceeds project, schedule, and industry standards ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [10M Data Records Lost, Underwater Computing, and Psychedelic Fish - Matthias Geniar](https://www.wearedevelopers.com/videos/1908-10m-data-records-lost-underwater-computing-and-psychedelic-fish-matthias-geniar) - [Mutation Testing and Fuzzing in C#](https://www.wearedevelopers.com/videos/703-mutation-testing-and-fuzzing-in-c) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) - [Develop on Windows, Deploy on Red Hat Enterprise Linux](https://www.wearedevelopers.com/videos/1600-develop-on-windows-deploy-on-red-hat-enterprise-linux) - [Test-reduction - Doing more with less](https://www.wearedevelopers.com/videos/977-test-reduction-doing-more-with-less) ## Related Articles - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [Fully Remote Software Engineer Jobs](https://www.wearedevelopers.com/magazine/447-fully-remote-software-engineer-jobs) - [Find a Developer Job: 12 Best Job Sites For Developers](https://www.wearedevelopers.com/magazine/165-find-a-developer-job-12-best-job-sites-for-developers) - [Where To Find Software Engineering Jobs](https://www.wearedevelopers.com/magazine/396-where-to-find-software-engineering-jobs) - [Dev Digest 166: Sycophancy, Zip bombs and AI Native Development](https://www.wearedevelopers.com/magazine/585-dev-digest-166-sycophancy-zip-bombs-and-ai-native-development)