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# Hardware Design Validation Engineer - Memory Subsystem

- **Company:** NVIDIA Corporation
- **Location:** Santa Clara, CA, United States
- **Experience:** Experienced
- **Salary:** $108,000.0 - $184,000.0
- **Contract:** Permanent contract
- **Skills:** C (Programming Language), Java (Programming Language), Microsoft Windows, C++ (Programming Language), Software Debugging, Linux, Logic Synthesis of Circuits, Perl (Programming Language), Firmware, Hardware Design, Python (Programming Language), Schematic Capture, Signal Integrity, Subsystems, Scripting, Programming Languages
- **Published:** August 28, 2026
- **Apply:** https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Hardware-Design-Validation-Engineer---Memory-Subsystem_JR2020813

## About the Role

* BS or MS EE degree with affinity for mixed signal/analog, embedded systems, and digital design (or equivalent experience).
 * 2+ years relevant experience.
 * Understanding of high speed signal integrity and experience with oscilloscopes.
 * Understanding of schematic capture and board design.
 * Working knowledge of PC systems, windows OS, and Linux.
 * Excellent understanding of EE fundamentals. Able to break problems down based on first principles.
 * Familiar with scripting or programming languages such as C, C++, JAVA, Python, or Perl.
 * Possess good collaboration and cross-disciplinary teamwork skills. Comfortable working across time zones.
 * Deeply curious about technology and passionate about learning.

Ways to stand out from the crowd:

 * Experience as a tutor or teacher's assistant.
 * Good presentation skills.

## Description

NVIDIA's System Product Team is looking for curious, collaborative, and motivated hardware engineers to take our GPU memory subsystem from first silicon power-on to production.

What you'll be doing:

 * Planning and performing DDR memory tuning, validation, and feature enablement on NVIDIA products.
 * Reviewing silicon design specifications, component datasheets, board schematics, and layout.
 * Exercising your understanding of digital, analog, and computer design to debug and resolve controller, memory, board, or software/firmware level issues at all stages of the product.
 * Refining our memory bringup and validation strategy. Providing feedback and recommendations to silicon, board, and software teams.


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