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# PDL/FPGA-Hardware-Tester

- **Company:** Zoiss Engineering Gmbh
- **Location:** Waldshut-Tiengen, Germany
- **Salary:** €47,500.0 - €63,000.0
- **Contract:** Permanent contract
- **Skills:** Field-Programmable Gate Array (FPGA), Tcl (Programming Language), VHSIC Hardware Description Language (VHDL), Information Technology
- **Published:** August 29, 2026
- **Apply:** https://www.xing.com/jobs/lindenberg-im-allgaeu-pdl-fpga-hardware-tester-149355559

## About the Role

* Successfully completed studies in the field of computer science, electrical engineering, electronics or similar qualification
 * Experience in development and/or verification of PLD/FPGA
 * Knowledge of modern verification methods
 * Knowledge of VHDL and TCL
 * Analytical and structured way of working
 * English (must) and German (min. Level B1) skills
 * Team player
 * ISTQB qualification (nice to have)
 * DO-254 Knowledge (nice to have)

## Description

* Definition of requirements of PLD/FPGA test and its test equipment
 * Verification and evaluation of verification data and test results
 * Creation of test and verification documentation
 * Development of test applications
 * Creation and performance of verification tool qualifications, as well as their further development
 * Analysis methods development and their performance for customer products