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# Principal FPGA Digital Design Engineer - Sign-on Bonus

- **Company:** BAE Systems
- **Location:** Austin, TX, United States
- **Experience:** Expert
- **Salary:** $118,095.0 - $200,762.0
- **Contract:** Permanent contract
- **Skills:** Adobe InDesign, Bash Shell, IBM Rational ClearCase, Computer Engineering, Data Transmissions, Software Debugging, Logic Synthesis of Circuits, Perl (Programming Language), Ethernet, Field-Programmable Gate Array (FPGA), Python (Programming Language), MATLAB, PCI Express, Static Timing Analysis, Subversion, SystemVerilog, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Application Specific Integrated Circuits, Fpga Hardware, ModelSim, Git, Low Latency, Physical Design, Software Version Control
- **Published:** August 29, 2026
- **Apply:** https://www.austinjobsite.com/job.asp?id=3369518360&tx=TT4037TTZ&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* Current Security Clearance (Secret), or eligible to obtain one
 * 6 years of relevant experience with bachelor s degree (less with an advanced degree)
 * Experience in FPGA or ASIC Design / Development, including:
 * VHDL (preferred) or Verilog HDL coding
 * Familiarity with Xilinx Vivado or Intel/Altera Quartus
 * Experience with internal logic analyzer (ILA/chipscope/signaltap)
 * Digital simulation using Modelsim/Questa
 * Experience with static timing analysis and timing closure
 * Experience with clock domain crossing techniques
 * Experience with high-speed interfaces like SERDES, PCIe, DDR2/3/4, LVDS
 * Familiarity with revision control (GIT, CVS, Clearcase, Subversion, etc.)
 * Experience generating scripts (Perl, Tcl, Python, shell, etc.)
 * Strong debug and problem-solving skills
 * Lab testing support
 * Strong written and oral communication skills
 * Self-starter and a good team player
 * Ability to mentor and willingness to be mentored

Preferred Education, Experience, & Skills

 * Experience with DSP fundamentals and FPGA implementation
 * Experience with Matlab/Simulink
 * Experience dealing with legacy designs
 * Experience in hands-on lab debug
 * Experience with SoC designs
 * Experience with Low Latency design
 * Working knowledge of UVM/SystemVerilog
 * Working knowledge of Radar systems
 * Working knowledge of Video/EOIR processing systems
 * Working knowledge of data communications (Ethernet MAC, PHY, Gig-E vision)
 * Working knowledge of stepper motor control
 * Working knowledge of C/C

## Description

Countermeasure & Electromagnetic Attack Solutions (CEMA) Hardware Engineering Group is looking for a Principal FPGA Digital Design Engineer to support FPGA designs through all phases of development.The ideal candidate is expected to perform activities including assisting in design architecture, ownership of RTL coding, synthesis, place and route, timing closure, basic test bench development, lab testing, product support and FPGA security.


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