> Markdown version of [/jobs/ext/2293599-principal-signal-integrity-engineer-r-d-networking-platforms](https://www.wearedevelopers.com/jobs/ext/2293599-principal-signal-integrity-engineer-r-d-networking-platforms). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Principal Signal Integrity Engineer - R&D Networking Platforms - **Company:** Hewlett-Packard Enterprise - **Location:** Roseville, CA, United States - **Salary:** $153,500.0 - $310,500.0 - **Contract:** Permanent contract - **Skills:** Computer Engineering, Digital Technology, Networking Hardware, Signal Integrity, Systems Architecture, AI Infrastructure, Application Specific Integrated Circuits, Hfss, Ansys - **Published:** August 29, 2026 - **Apply:** https://hpe.wd5.myworkdayjobs.com/Jobsathpe/job/Roseville-California-United-States-of-America/Principal-Signal-Integrity-Engineer---R-D-Networking-Platforms_1211098-2 ## About the Role * Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or related field. * 15+ years of experience in signal integrity, power integrity, package design, PCB design, and high-speed system architecture. * Recognized expert in high-speed digital system design with deep understanding of electromagnetic theory, transmission line behavior, crosstalk, loss mechanisms, jitter, equalization, and channel optimization. * Extensive experience architecting and validating high-speed systems utilizing advanced SerDes technologies and complex networking platforms. * Demonstrated success leading SI/PI strategies across multiple large-scale product developments from concept through production. * Expert knowledge of SI/PI simulation methodologies, including time-domain, frequency-domain, statistical, BER, and electromagnetic analysis. * Deep expertise with industry-standard tools such as Synopsys HSPICE, Keysight ADS, Ansys HFSS, SIwave, PowerSI, and Cadence design environments. * Extensive experience defining PCB stackups, design constraints, routing architectures, power distribution networks, and signal integrity requirements for high-volume products. * Hands-on expertise using advanced laboratory instrumentation including VNAs, TDRs, high-bandwidth oscilloscopes, spectrum analyzers, and compliance test equipment. * Proven ability to correlate simulation results with laboratory measurements and drive improvements in modelling accuracy and design predictability. * Strong understanding of system-level interactions between signal integrity, power integrity, thermal performance, electromagnetic compatibility, and manufacturability. Additional Preferred Abilities * Demonstrated technical leadership across geographically distributed engineering teams. * Ability to influence architecture and engineering decisions across organizations without direct authority. * Proven track record of mentoring engineers and developing technical capabilities within an organization. * History of innovation through patents, publications, industry collaboration, or significant technical contributions. * Excellent communication and presentation skills, with the ability to explain complex technical concepts to engineers, architects, executives, and customers. * Strong business and engineering judgment, balancing technical excellence with schedule, product cost, risk, and scalability considerations. * Self-directed leader capable of defining technical direction in highly ambiguous environments. ## Description As a Principal Signal Integrity Engineer, you will serve as the organization's technical authority for signal and power integrity, driving architectural decisions, engineering excellence, and innovation across multiple product families. You will: * Define and drive the SI/PI technical strategy, methodologies, design standards, and engineering best practices across networking hardware platforms. * Lead signal and power integrity architecture for next-generation networking systems, influencing platform design from concept through production. * Provide technical leadership for high-speed interfaces, including next-generation SerDes technologies operating at leading-edge data rates. * Establish company-wide SI/PI design guidelines, PCB stackup strategies, routing methodologies, and validation approaches to ensure scalable and repeatable success. * Lead cross-functional technical reviews and drive resolution of the most complex SI/PI challenges spanning multiple products and engineering disciplines. * Develop advanced simulation methodologies, modelling approaches, and automation techniques to improve engineering productivity and design quality. * Drive SI/PI technology readiness for future generations of networking products, evaluating emerging technologies and enabling adoption of new architectures and materials. * Lead root-cause investigations of complex field, validation, and manufacturing issues involving signal integrity, power integrity, timing, and electromagnetic interactions. * Partner with ASIC, package, PCB, mechanical, thermal, and system architects to optimize end-to-end electrical performance. * Champion technical innovation through patents, industry engagement, publications, and contributions to next-generation technology development. * Mentor and develop engineers across multiple sites, helping build organizational SI expertise and long-term technical capability. * Serve as the final escalation point for critical SI/PI technical decisions, balancing performance, risk, schedule, and product cost. Why You'll Love Working Here * Technical leadership role influencing multiple networking platforms and future technology roadmaps * Opportunity to shape engineering methodologies and standards across the organization * Work on cutting-edge networking and AI infrastructure technologies * High visibility with engineering leadership and architects * Strong culture of innovation, technical excellence, and continuous learning * Significant opportunities to drive patents and industry-leading technical solutions ## Related Videos - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Cloud Vendor Lock-In - Is it just a new version of the Database Abstraction Layers?](https://www.wearedevelopers.com/videos/1185-cloud-vendor-lock-in-is-it-just-a-new-version-of-the-database-abstraction-layers) - [Angular Signals: what's all the fuss about?](https://www.wearedevelopers.com/videos/684-angular-signals-what-s-all-the-fuss-about) - [Colorful quantum randomness](https://www.wearedevelopers.com/videos/100257-colorful-quantum-randomness) - [Robust AIGC Provenance with Invisible Watermarking](https://www.wearedevelopers.com/videos/100222-robust-aigc-provenance-with-invisible-watermarking) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) ## Related Articles - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [Top Characteristics of a Software Engineer](https://www.wearedevelopers.com/magazine/166-top-characteristics-of-a-software-engineer) - [How Engineering Hubs Build Visibility at Developer Conferences like WeAreDevelopers World Congress](https://www.wearedevelopers.com/magazine/720-how-engineering-hubs-build-visibility-at-developer-conferences-like-wearedevelopers-world-congress) - [From developer to manager – what does it take to become an engineering manager?](https://www.wearedevelopers.com/magazine/42-from-developer-to-manager-what-does-it-take-to-become-an-engineering-manager) - [Software Engineer Career: Things You Should Know](https://www.wearedevelopers.com/magazine/143-software-engineer-career-things-you-should-know) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated)