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# R&D IC Design Engineer

- **Company:** Broadcom
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Adobe InDesign, Unix, Computer Engineering, Software Debugging, Perl (Programming Language), Ethernet, Hardware Description Language, Python (Programming Language), Software Requirements Analysis, Subsystems, Verilog, VHSIC Hardware Description Language (VHDL), Application Specific Integrated Circuits
- **Published:** August 30, 2026
- **Apply:** https://dejobs.org/x/x/C2E01839B3DC45D98F80DE21A9C8362B/job/

## About the Role

* B.S degree in EE or computer Engineering. Minimum of 12 years of work experience with direct related technical skill
 * M.S degree/Ph.D in EE or Computer Engineering with 10 years of work experience.
 * Good knowledge of ARM subsystem
 * Good knowledge of high speed digital circuit design.
 * Good knowledge of 10G/100G Ethernet and OTN network
 * Good knowledge of digital signal processing and error correction code is a plus
 * Strong analytical and problem solving skills as well as hands-on lab debugging experiences
 * Good knowledge of RTL simulation and synthesis.
 * In-depth knowledge for design for low power and design for test and design for manufacturing.
 * Good Knowledge in languages relevant to the ASIC development process including Verilog, VHDL, Unix/Perl Scripting or Python, and C.
 * Experience with High-level Synthesis in design and verification is a plus.
 * Self-motivated, excellent communication skills and ability to excel in a team environment.
 * Good organization skills, able to follow through & bring issue to closure
 * Understand the entire IC development flow & procedure including silicon volume production qualification requirements & procedures
 * Enthusiastic & enjoy IC development works
 * DSP design knowledge is a plus
 * Knowledge Backplane/cable/optical fiber communication is a plus
 * Be able to work with teams at remote locations with different time zone.

## Description

* This opening work on chip design which enables 10Gbps/40Gbps/100Gbps/400Gbps backplane/cable/optical fiber communication
 * architect block level design specifications from the marketing requirements and/or system requirements
 * prepare detailed design document, timing constraint file
 * HDL coding, equivalency checking, STA result review, CDC checks, Lint checks, RTL/gate level simulations & silicon debugging
 * scripting for various IC design tasks such as STA, equivalency checks, test bench, simulations, synthesis, etc.
 * prepare block level resource requirements & development schedule
 * generate verification & test plans for design validation
 * Perform design tradeoff analysis - leakage, dynamic power, die size, schedule, resource, priority, etc.
 * silicon bring up


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