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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # DSP Engineer - **Company:** ThinKom Solutions - **Location:** Hawthorne, CA, United States - **Experience:** Expert - **Salary:** $120,000.0 - $160,000.0 - **Contract:** Permanent contract - **Skills:** Beamforming, C++ (Programming Language), Computer Engineering, Data Distribution Service, Software Debugging, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Python (Programming Language), Metadata, NetCDF, Network Protocols, PCI Express, Signal Processing, Signal Integrity, SystemVerilog, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Scripting, Fpga Hardware, ModelSim, Hardware Acceleration, Software Defined Radio - **Published:** May 13, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=2c0badbfe4107059 ## About the Role Do you have experience in VHDL?, * MS or BS in Electrical Engineering, Computer Engineering, or related field, or related engineering field. * 5+ years of professional experience in FPGA development, specifically in signal processing and high-speed I/O. * Proven expertise with Xilinx HLS (Vivado / Vitis) and writing performance-critical C++ for FPGA synthesis. * Hands-on experience with coherent combining, beamforming, or similar multi-channel synchronization techniques. * Strong knowledge of VITA 49, including metadata handling and packet-based transport of digitized signals. * Knowledge of Software-Defined Radio (SDR) is a plus. * Experience with Xilinx RFSoC is a plus. * Proficiency in VHDL/Verilog and FPGA design methodologies. * Experience with Vivado Design Suite and Xilinx SDK. * Familiarity with high-bandwidth networking protocols (Ethernet up to 100Gb, PCIe, or similar). * Solid grasp of digital signal processing fundamentals (filters, FFTs, channelization, interference cancellation). * Proficiency in FPGA development flows (Vivado, ModelSim, or similar) and lab debugging (ILAs, scopes). * Excellent communication and collaboration skills. * Advanced degree (MSEE/PhD) with a focus on DSP, RF Communications, or FPGA acceleration preferred. * Experience with additional standards/protocols relevant to software-defined radio or phased-array systems preferred. * Familiarity with scripting languages (Python, TCL) for automation and testing is highly desirable. * Track record of publishing or patenting innovations in signal processing or hardware acceleration highly desirable. Language Skills * Interpersonal skills to effectively work with internal peers as well as working effectively with suppliers and customers. * Ability to effectively present information in team meetings and design reviews, as needed. * Ability to communicate clearly and effectively in verbal and written form. Other Abilities * Must have substantial reasoning and problem-solving abilities. * Ability to meet deadlines and work extended hours, as needed. * Strong analytical skills and solid work ethic. ## Description Join Thinkom Solutions as a DSP Engineer specializing in coherent RF signal combining and beam forming. We are seeking a technical lead to architect, design, and develop robust FPGA-based solutions within a C++/Xilinx HLS environment. If you excel at creating and optimizing high-bandwidth RF architectures and turning theoretical DSP into efficient silicon reality, we want to hear from you., * Develop coherent combining and beamforming modules using C++ and Xilinx HLS, ensuring precise phase alignment and time delay across multiple channels. * Requirements capturing, design definition & implementation of VHDL detailed designs. * Implement VITA 49-compliant data packetization for high-speed IF or RF data distribution. * Design and fine-tune DSP blocks (e.g., FFT, filtering, NCO, cross-correlation) to meet stringent real-time and resource utilization requirements. * Work closely with cross-functional teams to ensure signal integrity and minimize latency in large-scale, multi-channel systems. * Use Vivado (or Vitis) for synthesis, simulation, timing closure, and debug. * Create testbenches in C++/System Verilog/Python to validate functional correctness and phase coherence across all channels. * Provide guidance to junior engineers, reviewing design approaches and ensuring best practices for coherent signal processing. * Collaborate with firmware, software, and hardware teams to define project requirements and deliver high-quality solutions on schedule. * Other duties as assigned. ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Unlocking the potential of Digital & IT at Vodafone](https://www.wearedevelopers.com/videos/602-unlocking-the-potential-of-digital-it-at-vodafone) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) ## Related Articles - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [Top 6 Hackathons for Developers in 2023](https://www.wearedevelopers.com/magazine/263-top-6-hackathons-for-developers-in-2023) - [Fully Remote Software Engineer Jobs](https://www.wearedevelopers.com/magazine/447-fully-remote-software-engineer-jobs) - [Where To Find Software Engineering Jobs](https://www.wearedevelopers.com/magazine/396-where-to-find-software-engineering-jobs) - [Résumé-Driven Development: How IT trends affect the job market for software developers](https://www.wearedevelopers.com/magazine/59-resume-driven-development-how-it-trends-affect-the-job-market-for-software-developers) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline)