> Markdown version of [/jobs/ext/240178-design-verification-engineer-coherent-interconnect](https://www.wearedevelopers.com/jobs/ext/240178-design-verification-engineer-coherent-interconnect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Design Verification Engineer, Coherent Interconnect - **Company:** Samsung - **Location:** Austin, TX, United States - **Experience:** Expert - **Salary:** $151,000.0 - $251,800.0 - **Contract:** Permanent contract - **Skills:** Adobe InDesign, Unix, Software Debugging, Perl (Programming Language), Formal Verification, SystemVerilog, Network Switches, Caching, Git, Information Technology, Physical Design, Software Coding - **Published:** May 19, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=aac38fa100fbd49a ## About the Role * 10+ years of experience with a Bachelor's Degree in Computer Science/Engineering, or 8+ years of experience with a Master's Degree, or 6+ years of experience with a Ph.D. * 8+ years of professional experience in a design verification role building testbenches from scratch * Strong background in design verification of coherent interconnects, combined experience with LPDDR memory controllers is a plus * Proficiency in ARM protocols - CHI, AXI, ACElite, APB * Strong coding skills in System Verilog, UVM * Experience with Git version control, Unix/Perl scripting * Formal verification skills will be a plus * Strong communication and collaboration skills, with the ability to navigate ambiguity in a fast-paced, global team environment., This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information. ## Description As a Design Verification Engineer, you will contribute to the verification of System IP, including coherent interconnects and caches. The ideal candidate will have a background in design verification, testbench architecture, and knowledge in methodologies across both block- and top-level environments. You will execute verification strategy, implement best practices, and support project goals in collaboration with global cross-functional teams to advance Samsung's cutting-edge coherent interconnect IPs that power next-generation consumer mobile products. * You develop and maintain deep expertise in microarchitecture and design verification for coherent interconnect IPs to develop, verify, and optimize high-performance, low-latency interconnect solutions that meet the needs of complex SoC designs. * You play a role in architecting, developing, and maintaining reusable verification environments and testbenches from scratch, including stimulus, assertions, checkers, covergroups, and SystemVerilog constraints. * You support design excellence and thorough verification of key features by contributing to test plans, verifying feature correctness, performing code and spec reviews, debugging functional failures from regressions to identify root cause, and performing coverage analysis to identify gaps and propose improvements. * You contribute to defining new verification methodologies, improving flows and productivity, and adopting advanced practices such as power-aware verification with UPF and gate-level simulations. * You collaborate with design, SoC, physical design, and performance verification teams to analyze and debug failures, resolve spec issues, and enable successful bring-up across IP, SoC, and silicon. * You take initiative on moderate-to-complex projects and contribute to a high-performing team culture by communicating openly and exercising data-driven decision making. ## Related Videos - [How a Small Team Shrank a Microsoft Monorepo by 94%](https://www.wearedevelopers.com/videos/1236-how-a-small-team-shrank-a-microsoft-monorepo-by-94) - [WeAreDevelopers LIVE - Node and Package Security](https://www.wearedevelopers.com/videos/2138-wearedevelopers-live-node-and-package-security) - [HTTP headers that make your website go faster](https://www.wearedevelopers.com/videos/1676-http-headers-that-make-your-website-go-faster) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Git for Code Reviews](https://www.wearedevelopers.com/videos/429-git-for-code-reviews) - [You don't need to write the code. You need to become a verification architect and prove it's correct](https://www.wearedevelopers.com/videos/100023-you-don-t-need-to-write-the-code-you-need-to-become-a-verification-architect-and-prove-it-s-correct) ## Related Articles - [Dev Digest 188: CfP time, the risks of NPM and IKEA algorithms](https://www.wearedevelopers.com/magazine/635-dev-digest-188-cfp-time-the-risks-of-npm-and-ikea-algorithms) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Are design and development really just the same thing?](https://www.wearedevelopers.com/magazine/520-are-design-and-development-really-just-the-same-thing) - [Dev Digest 129 - Now that's what I call private data!](https://www.wearedevelopers.com/magazine/468-dev-digest-129-now-that-s-what-i-call-private-data) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Dev Digest 118 - not a total recall](https://www.wearedevelopers.com/magazine/452-dev-digest-118-not-a-total-recall)