> Markdown version of [/jobs/ext/2461542-senior-design-engineer](https://www.wearedevelopers.com/jobs/ext/2461542-senior-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Design Engineer - **Company:** Micron Technology, Inc. - **Location:** San Jose, CA, United States - **Experience:** Expert - **Salary:** $116,000.0 - $246,000.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Bash Shell, Software Documentation, System Configuration, Software Debugging, Linux, Firmware, Flash Memory, JSON, Python (Programming Language), SQLite, Subsystems, Tcl (Programming Language), Verilog, Linux Virtual Server, XPath, Scripting, Software Coding, Software Version Control - **Published:** August 3, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=7734afe9b21e231d ## About the Role * Ph.D. preferred, MS in electrical engineering required. 4+ years of NAND design relevant proven experience required with prior CIM projects led or contributed. * A high level of self-motivation. * Good fundamentals in semiconductor and device physics and analog/mixed-signal circuit design. An understanding of semiconductor reliability issues including CHC, NBTI, stress, and snapback, as well as Electro-migration (EM) and IR analysis. * Strong circuit debugging and problem-solving skills. * Experience of circuit verification and optimization, layout planning, parasitic extractions of the circuits, experience guiding layout. * Strong coding skills in Python (plus Bash/Tcl a bonus), and comfort working with structured data (CSV/JSON/SQLite) and version control., * Knowledge of analog and digital simulators such as HSPICE, Fast SPICE, and Verilog * Familiarity with Cadence design, LVS/DRC tools (a plus). * Experience with a scripting language. * Familiarity with Linux/UNIX ## Description As a Senior Engineer in the NVE Design Engineering Core group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products! What's Encouraged Daily: * Develop array waveforms with detailed timing and biasing conditions of array signals. This requires in-depth familiarity of Nand Flash memory read, program and erase algorithms. * Collaborate closely with Firmware team, Analog team and Design validation teams during actual implementation of waveforms. * Plan the wordline and bitline path architecture according to area, performance and power specifications. Determine the placement of these circuit blocks and collaborate with project teams in integrating these circuit blocks to the chip plan. * Perform die size cost and benefits analysis of new array circuits and algorithms prior to implementation. Working closely with other functional teams to evaluate, analyze, and improve NAND power consumption. * Generate Xpath, Ypath and Array schematics during project execution and work with project teams integrating the Core schematics into the fullchip schematics. Perform block level simulations of the circuits using spice simulator and lead all aspects of layout implementation of the circuits. Perform subsystem and fullchip simulations during project execution. * Develop and maintain Python-based automation, efficient work flow by employing AI, and AI assisted utilities that work with EDA environments to accelerate design tasks such as environment setup, corner execution, regression runs, automated documentation and intelligent/predictive design/layout techniques. * Review existing and generate new user documentation. * Working with and supporting the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. ## Related Videos - [Docker network without Docker](https://www.wearedevelopers.com/videos/1418-docker-network-without-docker) - [Scrape, Train, Predict: The Lifecycle of Data for AI Applications](https://www.wearedevelopers.com/videos/1652-scrape-train-predict-the-lifecycle-of-data-for-ai-applications) - [Tips and Tricks for Working with JSON](https://www.wearedevelopers.com/videos/1229-tips-and-tricks-for-working-with-json) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Docker exec without Docker](https://www.wearedevelopers.com/videos/1094-docker-exec-without-docker) - [Are Classical Automation Frameworks Dead? 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