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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # GPU Design Implementation Engineer(Synthesis) - **Company:** Qualcomm - **Location:** Austin, TX, United States (Remote available) - **Experience:** Experienced - **Salary:** $133,600.0 - $200,400.0 - **Contract:** Permanent contract - **Skills:** Systems Engineering, Computer Engineering, Microarchitecture, Software Debugging, Logic Synthesis of Circuits, Electronic Design Automation, Perl (Programming Language), Formal Verification, Python (Programming Language), Software Engineering, Static Timing Analysis, Tcl (Programming Language), Scripting, Application Specific Integrated Circuits, Information Technology, Vlsi Design, Physical Design - **Published:** May 19, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=cb94c1deef9b265c ## About the Role Do you have experience in Time management?, Do you have a Master's degree?, * Experience with digital design and RTL synthesis * Experience with front end EDA tools such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime * Strong understanding of CMOS circuit design and design techniques to push Power, Performance and Area of complex designs * Ability to think outside the box for innovative solutions to improve power and eliminate performance bottlenecks * Strong understanding of GPU micro-architecture and collaborate with RTL designers to improve bottlenecks for power and performance * Solid working knowledge of scripting skills including tcl, perl or python * Excellent communication skills and collaborating in a team environment is a must * Excellent debug and analytical skills Preferred Skills: * Hands-on working experience in Physical design implementation is an advantage * Working knowledge of sub-micron technology process nodes eg. 5nm, 4nm and below is highly advantageous (FINFETs and GAA) * Knowledge and experience of graphics design and development * Excellent interpersonal and team skills yet able to work independently and able to provide insights to solve complex problems, unique and detailed issues * Familiar with the latest industry standard EDA tools for synthesis, formal verification, timing analysis and physical design * Solid experience with leading a high performance team to push aggressive PPA targets is advantageous * Strong background in VLSI design, scripting Minimum Skills: * Bachelor's degree in Electrical/Computer Engineering or related field with 5+ years of direct front end implementation and physical design work experience * Master's degree in Electrical/Computer Engineering or related field with 4+ years of direct front end implementation and physical design work experience * PhD in Electrical/Computer Engineering or related field with 5+ years of direct front end implementation and physical design work experience * Strong background and experience working with industry standard Synthesis and Place and Route tools including Signoff tools * Hands on experience taping out designs in sub-micron technology node design < 10nm * Expect strong self-motivation and time management skills, * Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience., Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 1+ year of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field. ## Description The Design Implementation Engineer will work in Qualcomm's Adreno GPU team and will be responsible for managing all aspect of front end implementation design challenges and methodology. As a member of the Graphics team, the successful applicant will integrate, implement and deliver state of the art GPU cores and will be working closely with the graphics microarchitecture and physical design teams to push and meet very aggressive Power, Performance and Area (PPA) targets. This role is a hands on role which include working with execution driven teams for tape-outs by supporting new methodologies and new flows required to address better PPA. The successful candidate will possess in-depth understanding of ASIC design flow and the challenges posed by advanced deep sub-micron technologies. ## Related Videos - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) - [Building a fully automated escape room](https://www.wearedevelopers.com/videos/735-building-a-fully-automated-escape-room) - [JavaScript? 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