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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Data Center SoC Power & Limits Architect - **Company:** Qualcomm - **Location:** Santa Clara, CA, United States (Remote available) - **Experience:** Experienced - **Salary:** $164,000.0 - $264,500.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Data Centers, Firmware, Monitoring of Systems, Python (Programming Language), MATLAB, Software Architecture, Systems Architecture, Systems Integration, High Performance Computing, Application Specific Integrated Circuits - **Published:** August 4, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=34f059e75fc20765 ## About the Role * 10+ years of experience in power architecture, system architecture, or related domains * Deep expertise in: + Power management systems and limits control + Thermal and electrical constraints in high-performance systems + DVFS/DCVS, power capping, and control systems * Strong understanding of: + Data center/server architecture (CPU/GPU/accelerators, memory systems) + Power delivery networks (VRs, PDN, rack power distribution) + Telemetry, sensors, and system monitoring * Experience with modeling and analysis tools (e.g., MATLAB, Python), * Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience., Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. ## Description The Data Center Power & Limits Architect will define and drive next-generation power management, thermal, and system limits architecture for large-scale compute platforms (SOC, servers, racks, and cluster-level deployments). With AI/HPC workloads pushing infrastructure to electrical and thermal limits, this role is responsible for enabling maximum sustained performance within constrained power, cooling, and reliability envelopes by architecting end-to-end power and limits systems across silicon, platform, and data center infrastructure., 1. Power & Limits Architecture Definition * Define holistic power, thermal, and electrical limits architecture across silicon, board, system, rack, and cluster levels * Architect power budgeting, allocation, and enforcement mechanisms across CPU, GPU, memory, accelerators, and I/O * Develop strategies to maximize performance under datacenter-level constraints (rack power caps, cooling limits, PUE targets) 2. Dynamic Control & Optimization * Architect advanced dynamic power control systems (e.g., DVFS/DCVS, AVS-like systems) for fast transient response * Design closed-loop control systems using telemetry and feedback to optimize performance vs. constraints * Develop proactive and reactive limit management (thermal throttling, power capping, workload shaping) 3. Telemetry & System Integration * Define requirements and interfaces for telemetry infrastructure (sensors, BMC, firmware, system SW) * Enable real-time monitoring and decision making across system layers * Ensure integration with platform controllers (e.g., BMC/EC , rack management, orchestration layers) 4. Cross-Layer Co-Design * Collaborate with: + Silicon/SoC architects (power islands, regulators, sensors) + Platform teams (VRs, PDN, cooling) + Software/firmware teams (power management algorithms) + Data center infrastructure teams (rack-level optimization) * Define hardware/software partitioning for limits enforcement with minimal overhead 5. Modeling, Simulation & Validation * Develop system-level models (MATLAB/Simulink, architectural simulators) to: + Predict performance vs. power/thermal constraints + Evaluate algorithms and architecture trade-offs * Perform workload-driven analysis to validate architecture decisions 6. Innovation & Future Architecture * Drive innovations in: + Power delivery efficiency + Thermal-aware scheduling + AI workload-aware limits + Rack/cluster-level power orchestration * Define next-generation architectures to support scaling AI/HPC performance under constrained infrastructure ## Related Videos - [The Sustainability Race: AI's Promises, Pitfalls and Potential](https://www.wearedevelopers.com/videos/100155-the-sustainability-race-ai-s-promises-pitfalls-and-potential) - [Leveraging Large Language Models for Legacy Code Translation: Challenges and Solutions](https://www.wearedevelopers.com/videos/1157-leveraging-large-language-models-for-legacy-code-translation-challenges-and-solutions) - [Playing Pong on a shoulder press machine](https://www.wearedevelopers.com/videos/100140-playing-pong-on-a-shoulder-press-machine) - [Quantum Computing - The tiny and the big challenges](https://www.wearedevelopers.com/videos/934-quantum-computing-the-tiny-and-the-big-challenges) - [Software stack under and over the hood of the fastest accelerating car in the world](https://www.wearedevelopers.com/videos/221-software-stack-under-and-over-the-hood-of-the-fastest-accelerating-car-in-the-world) - [Building the Nervous System of AI - Michael Kagan (NVIDIA)](https://www.wearedevelopers.com/videos/2133-building-the-nervous-system-of-ai-michael-kagan-nvidia) ## Related Articles - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [7 Cloud Computing Trends Coming in 2025 for Developers](https://www.wearedevelopers.com/magazine/412-7-cloud-computing-trends-coming-in-2025-for-developers) - [Highest Paying Tech Companies for Developers](https://www.wearedevelopers.com/magazine/220-highest-paying-tech-companies-for-developers) - [Best US AI Conferences for CTOs in 2026: Build vs. Buy, Vendor Evaluation, and Peer Intelligence](https://www.wearedevelopers.com/magazine/736-best-us-ai-conferences-for-ctos-in-2026-build-vs-buy-vendor-evaluation-and-peer-intelligence) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline)