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# Elect Design and Analysis Engineer

- **Company:** Encode, Inc.
- **Location:** El Segundo, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Software Debugging, Digital Electronics, SystemVerilog
- **Published:** August 12, 2026
- **Apply:** https://www.clearancejobs.com/jobs/9091448/elect-design-and-analysis-engineer

## About the Role

* Engineering-minded verification engineers, not simply engineers who write test cases.
 * 7 or more years of verification 2+ UVM experience, though 5+ years is acceptable if UVM experience is solid.
 * Strong SystemVerilog and UVM experience
 * Self-checking and constrained-random verification; verification planning
 * Debugging; coverage closure
 * Active U.S. security clearance

General Recruiting Guidance

 * Across all positions, we are looking for engineers who:
 * Demonstrate strong digital hardware fundamentals.
 * Exercise sound engineering judgment.
 * Work independently with minimal oversight.
 * Communicate clearly and proactively.
 * Produce high-quality technical documentation.
 * Take ownership of their work and deliver maintainable engineering solutions.



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