> Markdown version of [/jobs/ext/2581873-fpga-team-lead](https://www.wearedevelopers.com/jobs/ext/2581873-fpga-team-lead). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA Team Lead - **Company:** QuEST Defense - **Location:** Washington, DC, United States (Remote available) - **Experience:** Expert - **Salary:** $166,400.0 - $187,200.0 - **Contract:** Permanent contract - **Skills:** Adobe InDesign, Computer Engineering, Software Debugging, Digital Electronics, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), Systems Development Life Cycle, Static Timing Analysis, Tcl (Programming Language), Strategies of Testing, VHSIC Hardware Description Language (VHDL), Vivado, Scripting, Fpga Hardware, ModelSim, Hardware Testing, Generative AI, Information Technology - **Published:** August 11, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=08895167ef6e619e ## About the Role * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. * 10+ years of experience in FPGA design, FPGA verification, digital hardware development, hardware testing, or related engineering work. * Minimum of 2+ years prior experience leading a small technical team, mentoring engineers, coordinating sprint execution, or managing technical task priorities. * Hands-on experience with FPGA design and verification using VHDL, UVM, or similar languages and methodologies. * Working knowledge of FPGA and hardware development lifecycles, including requirements, design and integration documentation. * Ability to troubleshoot FPGA, hardware, or integration issues through simulation, lab integration, debugging, and root cause analysis. * Experience supporting formal or informal test campaigns for hardware, FPGA, or electronic systems. * Ability to provide technical guidance, coordinate engineering tasks, mentor team members, or lead technical workstreams. * Strong communication skills with the ability to work with program leadership, customers, stakeholders, and cross-functional engineering teams. * Experience working in a structured, regulated, safety-critical, mission-critical, or quality-driven engineering environment. * U.S. citizenship or U.S. permanent residency is required. * Ability to travel approximately 10 to 15% during testing, integration, and key design phases as needed., * Hands-on experience with FPGA verification using VHDL, UVM, or similar languages and methodologies. * Experience in aerospace, defense, avionics, regulated engineering environment. * Experience with instrumentation and control electronic systems, real-time embedded hardware, safety-critical controls, or complex electronic systems. * Experience with FPGA development and simulation tools such as Quartus, Vivado, ModelSim, Questa, or similar tools. * Familiarity with scripting languages such as Python, Tcl, or similar tools used for automation, simulation, test, or workflow efficiency. * Experience supporting technical reviews, design reviews, test readiness reviews, milestone reviews, or customer-facing technical meetings. * Personnel management experience, including coaching, performance feedback, training plans, or employee development. * Experience in adoption and/or integration of emerging technologies (e.g., generative AI, automation platforms, digital assistants) into day-to-day operations for continuous improvement. * Experience with Doors and the Clear Quest family of products. ## Description Quest Defense Systems & Solutions is seeking an FPGA Team Lead to support the modernization of surveillance avionics, which requires firmware development compliant with DO-254 and DO-178C for certification. This role will assign tasks, monitor progress, and provide direction for work activities. This is a technical leadership role for an engineer who can contribute directly to FPGA development while also helping guide execution for a small engineering team. The selected candidate will be involved in design specifications, FPGA simulation, and integration support. This role is best suited for someone who enjoys staying technically involved while also taking ownership of team coordination, delivery commitments, and engineering quality. The position may be based in Phoenix, AZ, or performed remotely, with approximately 10 to 15% travel during integration and key design phases. All candidates must be U.S. Citizens or U.S. Permanent Residents., FPGA Design & Technical Execution * Support FPGA development, simulation, and integration activities for instrumentation and control electronic systems. * Develop, update, and review FPGA design documentation, including design specifications, requirements, and traceability documentation. * Support simulation, debugging, root cause analysis, and resolution of FPGA design or verification issues. * Participate in FPGA design flow activities, including design implementation, simulation, synthesis, timing analysis, integration, and test support. * Support development and execution of informal and formal test campaigns for FPGA and hardware products. * Prepare, develop, and support engineering simulations and related hardware/software used in the development of I&C electronic systems. Team Leadership & Execution * Provide technical leadership and day-to-day coordination for a team of FPGA and hardware engineers. * Own task coordination, delivery commitments, and schedule visibility for assigned work. * Help translate program requirements and technical objectives into actionable engineering tasks. * Drive accountability, remove roadblocks, and support consistent progress across design and integration activities. * Guide and mentor engineers by providing technical direction, leveraging subject matter experts, and helping the team make sound engineering decisions. * Balance technical risk, program priorities, and resource needs to support on-time, high-quality delivery. Customer & Stakeholder Interface * Serve as a day-to-day technical point of contact for program management, customers, and internal stakeholders. * Communicate progress, risks, blockers, and mitigation plans clearly and professionally. * Support technical interchange meetings, sprint reviews, design reviews, test readiness reviews, and milestone reviews. * Coordinate across FPGA, hardware, systems, software, and test organizations to ensure alignment across the full development lifecycle. Technical Oversight & Risk Management * Review technical approaches, design decisions, verification plans, and test strategies with the engineering team. * Identify technical risk areas early and support mitigation planning with senior engineers and subject matter experts. * Ensure engineering work follows applicable QDSS processes, customer expectations, and quality standards. * Support integration planning, test readiness, troubleshooting, and issue resolution during key phases of development. * Foster a collaborative, high-performance team environment focused on technical quality, accountability, and continuous improvement. ## Related Videos - [JavaScript? No. Java Scripts! - Scripting with Java](https://www.wearedevelopers.com/videos/2094-javascript-no-java-scripts-scripting-with-java) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Intermediate Bitcoin Script](https://www.wearedevelopers.com/videos/25-intermediate-bitcoin-script) - [Quantum DevOps - Quantum Application Development](https://www.wearedevelopers.com/videos/1441-quantum-devops-quantum-application-development) - [Quantum DevOps - Enabling Industrial Engineering](https://www.wearedevelopers.com/videos/100282-quantum-devops-enabling-industrial-engineering) - [Oops! Stories of supply chain shenanigans](https://www.wearedevelopers.com/videos/245-oops-stories-of-supply-chain-shenanigans) ## Related Articles - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [Should senior developers refuse interview coding challenges?](https://www.wearedevelopers.com/magazine/29-should-senior-developers-refuse-interview-coding-challenges) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [How to Write a CV and Interview if You Don't Fully Qualify For The Job](https://www.wearedevelopers.com/magazine/183-how-to-write-a-cv-and-interview-if-you-don-t-fully-qualify-for-the-job) - [Highest Paying Tech Companies for Developers](https://www.wearedevelopers.com/magazine/220-highest-paying-tech-companies-for-developers) - [What’s the Difference between a Junior, Mid, and Senior Developer?](https://www.wearedevelopers.com/magazine/238-what-s-the-difference-between-a-junior-mid-and-senior-developer)