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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Staff Embedded Platform Engineer - **Company:** Ford Motor Company - **Location:** Palo Alto, CA, United States - **Experience:** Expert - **Salary:** $150,200.0 - $283,500.0 - **Contract:** Temporary contract - **Skills:** Board Bringup, Application Programming Interfaces (APIs), Confluence, JIRA, Unit Testing, Network Analysis, CMake, Program Optimization, Code Review, Communications Protocols, Computer Engineering, Software Debugging, Device Drivers, Embedded Software, Ethernet, Firmware, Hardware-In-The-Loop Simulation, Joint Test Action (IEEE Standards), Python (Programming Language), Real-Time Operating Systems, Verification and Validation (Software), Universal Asynchronous Receiver/Transmitter, Serial Peripheral Interface, Documentation System, Integration Tests, Information Technology, Bare Metal, Live Streaming, U-Boot - **Published:** August 17, 2026 - **Apply:** https://www.techcareers.com/job.asp?id=3357075985&tx=KJ2929FFP&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54 ## About the Role * Bachelor's degree in Electrical Engineering, Computer Science, or Computer Engineering (or equivalent experience). * 10+ years of relevant embedded development experience in C. * Hands-on experience in both bare-metal and RTOS environments. * Experience authoring and maintaining automated firmware test suites (unit, integration, and hardware-in-the-loop). * Experience with issue-tracking and documentation tools (e.g. JIRA/Confluence or equivalent) for tracking requirements, tasks, and results. * Knowledge of electrical engineering fundamentals, including circuit analysis and design. Even better, you may have... * Zephyr RTOS experience (devicetree, Kconfig, Twister, driver model, west), strongly preferred. * Experience developing and testing networking drivers/stacks, especially automotive/industrial Ethernet (10BASE-T1S, PLCA, MAC-PHY interfaces, PTP/time synchronization). * Experience designing watchdog, fault-handling, and safe-recovery mechanisms on resource-constrained MCUs. * Deep experience with UART/I2C/SPI protocol design and debugging (CRC/PEC, framing, retry/backoff, bus contention). * Experience integrating vendor source code and silicon, and reviewing register-level specifications. * Experience with build tooling such as CMake, Bazel, SCons, west. * Proficiency scripting test and automation tooling in Python. * Familiarity with security-adjacent firmware concerns (secure boot, credential storage, diagnostics such as UDS/DoIP). * Strong software fundamentals (design, maintainability, code review) and hands-on hardware bring-up, system debugging, and code optimization. * Collaborative mindset with strong written and verbal communication, and genuine interest in partnering with vendors to integrate new technology. ## Description * Design and implement reusable platform software across a multi-MCU distributed embedded system, favoring clean driver/service abstractions and portable component interfaces over app-specific one-offs. * Architect and implement device reliability infrastructure from the ground up, including watchdog and task-supervision design (feeding strategy, timeout policy, fault capture, and recovery/reset-reason reporting). * Own real-time Ethernet communication, including 10BASE-T1S with PLCA, IEEE 1588/PTP time synchronization, and UDP transport, and tune it for reliability under bandwidth-constrained, congested networks (including interaction with over-the-air updates). * Develop and maintain custom serial protocols over UART, I2C, and SPI (e.g. multi-device I2C command/streaming protocols with CRC/PEC integrity, firmware-update windowing, and robust error handling) for reliable exchange between MCUs and external components. * Specify, design, implement, and test both bare-metal and RTOS low-level firmware, including device drivers, HAL abstractions, and Kconfig/devicetree integration for a scalable, multi-board platform. * Build component test infrastructure: author unit/integration test suites (e.g. Twister, emulators/mocks, hardware-in-the-loop) for drivers and libraries that today lack coverage, and drive maturity, stability, and release-readiness metrics. * Resolve ambiguity in requirements, specifications, and hardware/vendor documentation, and turn open items into concrete, testable designs. * Bring up hardware and debug at bench and hardware-in-the-loop level using logic analyzers, oscilloscopes, and JTAG/SWD debuggers to verify software against silicon. * Define and implement system-level power, compute, and communication requirements, enabling different applications to select different capability/configuration combinations (including low-power modes). * Profile power, CPU, and bus utilization at the submodule and system level and drive optimizations. * Collaborate with verification and validation teams to build comprehensive test plans and validate firmware functionality, stability, and performance across operating and low-power conditions. * Interface with external silicon/module vendors: review firmware/register specifications, provide design guidance, and integrate and validate vendor code releases. * Maintain clear, concise documentation of design decisions, driver/service APIs, and firmware architecture. * Replace temporary or placeholder subsystems with long-term, maintainable architectures. ## Related Videos - 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