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# Principal Software Engineer - Compiler Development

- **Company:** Cadence Design Systems, Inc.
- **Location:** Burlington, MA, United States
- **Experience:** Expert
- **Salary:** $117,600.0 - $218,400.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Automation of Tests, C++ (Programming Language), Code Generation, Memory Management, Electronic Design Automation, Python (Programming Language), Parsing, SystemVerilog, Verilog, Multithreading, High Performance Computing, Large Language Models
- **Published:** August 11, 2026
- **Apply:** https://cadence.wd1.myworkdayjobs.com/External_Careers/job/Burlington-MA/Principal-Software-Engineer---Compiler-Development_R55827

## About the Role

* BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience
 * 5+ years in Compiler Development, EDA, or High-Performance Computing.
 * Expert-level C++ (modern standards) and a deep understanding of SystemVerilog or Verilog.
 * Proven track record in compiler theory (lexing, parsing, semantic analysis, code generation).
 * Experience with multi-threading, memory management, and cache-locality optimizations.
 * An inventive spirit with the desire to challenge the status quo of traditional EDA tools., * Knowledge of LLVM or similar compiler frameworks.
 * Experience with Python for internal tooling and test automation.
 * Familiarity with hardware verification environments (UVM).

## Description

* Language Evolution: Design and implement advanced SystemVerilog language extensions.
 * Compiler Architecture: Develop and optimize high-performance front-end and code generation compiler components, focusing on intermediate representations (IR) that scale to multi-billion gate designs.
 * Performance Engineering: Conduct deep-dive bottleneck analysis and implement performance optimizations in C/C++ to improve compilation speed and memory footprint.
 * Design Scalability: Architect compiler and simulator specifically tuned for complex AI designs, ensuring the engine can handle the massive replicated and parallel structures inherent in next-gen neural processing units (NPUs).
 * Innovation & Research: Explore and prototype "blue-sky" features, LLM enhanced Compilation, parallel compilation, distributed compilation., "You aren't just maintaining a tool; you are building the backbone of the semiconductor industry. As AI chips grow in complexity, the compiler becomes the primary gatekeeper of engineering productivity. Here, you will invent the techniques that allow the world's most advanced chips to reach the market."
 * Scale: Work on codebases that manage the largest designs on the planet.
 * Impact: Your optimizations directly reduce the "time-to-market" for global tech giants.
 * Future-Proofing: Be part of the transition toward AI-accelerated chip design and cloud-scale verification.


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