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# Platform Firmware Engineer, AI Data Center

- **Company:** Tesla Motors
- **Location:** Palo Alto, CA, United States
- **Experience:** Experienced
- **Salary:** $160,000.0
- **Contract:** Permanent contract
- **Skills:** C (Programming Language), Artificial Intelligence, Computer Engineering, Data Centers, Software Debugging, Linux, Device Drivers, Firmware, Joint Test Action (IEEE Standards), Kernel Debuggers, Linux Kernel, Linux-Powered Devices, Peer-To-Peer (P2P), PCI Express, Signal Integrity, Systems Architecture, Graphics Processing Unit (GPU), Performance Testing, Perf (Linux), Information Technology
- **Published:** August 20, 2026
- **Apply:** https://jobs.localjobnetwork.com/apply/add/88087299/1

## About the Role

* Degree in Computer Engineering, Electrical Engineering, Computer Science, or equivalent experience
 * 4+ years in firmware or low-level software development with apreferredfocus on PCIe
 * Deep knowledge of PCIe Gen 4/5/6 architecture-link training, transaction layer, and configuration space
 * Linux kernel driver development experience-device drivers, DMA, interrupts
 * Platform validation and performance testing experience covering PCIe, thermal, power, and system-level stress
 * Strong C programming skills and familiarity with kernel debug tools (ftrace, perf, crash)
 * Hands-on hardware debug experience-protocol analyzers, JTAG, oscilloscopes
 * Solid understanding of system architecture fundamentals-IOMMU, NUMA, memory hierarchies

## Description

You will own the firmware and Linux driver stack for these AI compute platforms. You will develop, optimize, and validate PCIe subsystems across custom SoCs, GPUs, and dense datacenter hardware so our interconnect infrastructure keeps pace with next-generation AI workloads.
What You'll Do

 * Develop and optimize PCIe Gen 5/Gen 6 firmware and Linux kernel drivers for Tesla's AI compute platforms
 * Implement PCIe enumeration, link training, and configuration for custom SoCs and accelerator cards
 * Bring up proto hardware and develop proof-of-concept firmware to validate new platform designs before production
 * Build and run platform-level validation-PCIe performance, thermal, power, and stress testing across the full compute stack under real AI training and inference workloads
 * Debug PCIe link failures, signal integrity issues, and protocol errors using analyzers and silicon debug tools
 * Develop Linux device drivers for custom hardware-DMA, interrupts, MMIO, and peer-to-peer transfers
 * Drive root-cause analysis of PCIe failures across firmware, kernel, and hardware boundaries


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