> Markdown version of [/jobs/ext/2633543-senior-serdes-system-design-engineer-architect](https://www.wearedevelopers.com/jobs/ext/2633543-senior-serdes-system-design-engineer-architect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Serdes System Design Engineer/Architect - **Company:** Broadcom - **Location:** Irvine, CA, United States - **Experience:** Expert - **Salary:** $143,800.0 - $230,000.0 - **Contract:** Permanent contract - **Skills:** Analog Electronics, C++ (Programming Language), Computer Programming, Data Recovery, Software Debugging, Firmware, MATLAB, PCI Express, Signal Processing, IEEE 802.3 - **Published:** August 14, 2026 - **Apply:** https://dejobs.org/x/x/14926DE3A9C34638BCA7B8609B207AAA/job/ ## About the Role * B.S.E.E. plus 12+ years relevant experience OR M.S.E.E. plus 10 years required) * Expert knowledge in Communication Theory * Expert knowledge in Digital Signal Processing algorithms * Working knowledge of Analog circuit behavior * Working knowledge of Transmission line theory and s-parameter * Expert in MATLAB, C/C++ programming * Good hands-on skills in the lab * Experience in designing high-speed Clock and Data Recovery (CDR) PLLs is a very big plus. * Experience in equalization techniques for wireline communication applications such as read-channel is also a very big plus. * RTL coding is a plus * Knowledge of IEEE 802.3/OIF 100G/200G/400G Serdes standards and PCIe Gen6/Gen7 standards is a plus ## Description This is a DSP/Systems Design Engineering position for high-speed Serdes products in the Physical Layer Products (PLP) Division. You will join a team of expert communication system/mixed-signal ASIC designers involved in the design, verification, and implementation of advanced signal processing algorithms for the physical layer of high-speed Serdes at speeds of 100G+. The types of algorithms that will be implemented include PAM & other higher-order modulation, single/multi-input adaptive equalizers/cancellers, single/multi-dimensioned FEC, digital filters, and interface/integration with analog functions and analysis and compensation for analog circuit non-idealities. You will be collaborating closely with analog & digital designers to successfully implement the algorithms in advanced silicon technology nodes and work with DVT/lab engineers to validate your designs for high-volume production. You will support the group contribute to the development of next-generation wireline communications standards at standard bodies such as IEEE and OIF. Responsibilities include: * Develop channel models and run simulations to help define Serdes architecture * Define and document signal processing block requirements, architecture, and lab test plan * Develop bit-exact MATLAB and C/C++ system models for simulation and verification * Develop and run system-level simulation suites of the Serdes to evaluate architectural tradeoffs * Work with the design team to perform vector matching verification with RTL simulations * Develop, test, and debug firmware associated with physical layer functionality * Lab testing and debug of Serdes * Documentation/application note development and customer support * Support marketing group with customer meetings and collateral ## Related Videos - [Leveraging Large Language Models for Legacy Code Translation: Challenges and Solutions](https://www.wearedevelopers.com/videos/1157-leveraging-large-language-models-for-legacy-code-translation-challenges-and-solutions) - [Playing Pong on a shoulder press machine](https://www.wearedevelopers.com/videos/100140-playing-pong-on-a-shoulder-press-machine) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Building a hypercar from scratch](https://www.wearedevelopers.com/videos/607-building-a-hypercar-from-scratch) - [Software stack under and over the hood of the fastest accelerating car in the world](https://www.wearedevelopers.com/videos/221-software-stack-under-and-over-the-hood-of-the-fastest-accelerating-car-in-the-world) - [Agent Smith Gets Hardware: Autonomous IoT Hacking From Debug Port to Cloud API](https://www.wearedevelopers.com/videos/100258-agent-smith-gets-hardware-autonomous-iot-hacking-from-debug-port-to-cloud-api) ## Related Articles - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [Software Engineer Career: Things You Should Know](https://www.wearedevelopers.com/magazine/143-software-engineer-career-things-you-should-know) - [Résumé-Driven Development: How IT trends affect the job market for software developers](https://www.wearedevelopers.com/magazine/59-resume-driven-development-how-it-trends-affect-the-job-market-for-software-developers) - [How software is steering vehicle technology](https://www.wearedevelopers.com/magazine/515-how-software-is-steering-vehicle-technology) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [7 Important Tips That Every Software Developer Should Know](https://www.wearedevelopers.com/magazine/101-7-important-tips-that-every-software-developer-should-know)