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# FPGA Implementation Engineer 5 (contract)

- **Company:** Boeing Company
- **Location:** El Segundo, CA, United States
- **Experience:** Experienced
- **Salary:** $218,400.0 - $239,200.0
- **Contract:** Permanent contract
- **Skills:** Systems Engineering, Digital Electronics, Field-Programmable Gate Array (FPGA), Hardware Description Language, SystemVerilog, Systems Integration, Verilog, Vivado, Application Specific Integrated Circuits
- **Published:** August 12, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=7f6fdc8638a7171d

## About the Role

* 5+ years of FPGA and/or ASIC design experience;
 * strong Xilinx/AMD Vivado experience;
 * Experience with Versal family devices;
 * Verilog/SystemVerilog HDL proficiency required;
 * Advanced FPGA implementation skills (synthesis, timing closure, constraints);
 * Active U.S. secret security clearance

Preferred Skills:

 * 2+ years of FPGA design experience;
 * strong Xilinx/AMD Vivado experience;
 * Verilog/SystemVerilog proficiency;
 * Advanced FPGA implementation skills (synthesis, timing closure, constraints);

Ideal candidates will:

 * Demonstrate strong digital hardware fundamentals.
 * Exercise sound engineering judgment.
 * Work independently with minimal oversight.
 * Communicate clearly and proactively.
 * Produce high-quality technical documentation.
 * Take ownership of their work and deliver maintainable engineering solutions.

## Description

This posting is for a contract assignment and is not a full-time employment offer with Boeing. Candidates selected for roles will be employed as contract workers through a Boeing approved 3rd party for the duration of the specified project.

Regular and predictable attendance is required
Work statement is a non-managerial role, non-leadership role.
The contractor will inherit FPGA top-level design and be responsible for creating and adding new functional blocks and interfaces, including integrating third-party and in-house IP cores. Responsibilities include updating constraint files, performing synthesis, simulation, and Place & Route processes to ensure timing closure and design integrity. The candidate will program FPGA devices, primarily from the Xilinx Versal, Ultrascale, and Ultrascale+ families.

Additionally, the contractor will collaborate closely with the system engineering team to support hardware and software system integration as well as testing activities to deliver a fully functioning system. Therefore, on-site work is required.


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