> Markdown version of [/jobs/ext/2638624-design-infrastructure-engineer](https://www.wearedevelopers.com/jobs/ext/2638624-design-infrastructure-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Design Infrastructure Engineer - **Company:** Micron Technology, Inc. - **Location:** RICHARDSON, United States - **Contract:** Permanent contract - **Skills:** Computer-Aided Design, Software Debugging, Dynamic Random-Access Memory, Perl (Programming Language), Python (Programming Language), Signal Integrity, Tcl (Programming Language), Scripting, Epic ECSM, Virtual Agents - **Published:** August 10, 2026 - **Apply:** https://www.dice.com/job-detail/356666c5-39a5-4f0d-93bf-f9db78063df1 ## About the Role * Bachelor\'s or Master?s Degree or equivalent experience in Electrical Engineering or a related field, along with strong fundamentals in CMOS digital and mixed-signal circuit development, device physics, and PVT variation. * Practical experience with standard or custom cell characterization procedures?including Liberty modeling (CCS/ECSM or equivalent) and SPICE-based simulation?is essential. * A solid understanding of STA flows and timing libraries, combined with proficiency in scripting languages such as Python, Perl, or Tcl for automation, is required., * Experience in SiliconSmart or PrimeLib is preferred. * Experience working across multiple semiconductor process technologies is highly desirable. * Experience in HBM, DRAM, or high-speed interface development is preferred, particularly in environments involving advanced foundry PDKs such as TSMC nodes. * Familiarity with high-speed PHY development, TSV-aware considerations, and advanced modeling topics such as signal integrity, EMIR effects, aging, and reliability will differentiate candidates. * Prior exposure to infrastructure or methodology development?beyond just using characterization flows?is strongly valued, as this role requires building scalable solutions rather than implementing predefined flows. * Good understanding of Agentic AI or willingness to learn Agentic AI to help develop efficient workflow. ## Description You will work where circuit build, EDA infrastructure, and silicon validation readiness meet. You will develop robust, scalable, and high-quality characterization flows. These flows directly affect timing closure, power modeling, and product quality for next-generation HBM programs., * Develop and sustain scalable infrastructure for standard cell and custom cell characterization, encompassing timing, power, noise, and signal integrity modeling. * Build reusable, automated flows that support multi-corner, multi-mode (MCMM) characterization across extensive PVT spaces. Develop robust Liberty model generation, validation, and regression frameworks to ensure high-quality results for downstream design and signoff flows. * Enable characterization across diverse process technologies, including Micron internal nodes and external foundries such as TSMC. Address technology-specific challenges such as variability, layout-dependent effects, aging, and reliability, and promote consistent approaches that allow seamless portability and standardization across multiple process nodes. * Support characterization requirements across various HBM product verticals, including core dies and multiple custom base dies. Also support emerging advanced HBM architectures. Collaborate closely with design teams to develop characterization requirements for specialized circuit classes like TSV interfaces, PHY-critical paths, and high-speed datapath elements. Ensure these align with system-level performance and power targets. * Integrate characterization flows into broader build and verification ecosystems by partnering with design, verification, and CAD teams. Drive improvements in model accuracy, turnaround time, and silicon correlation while establishing standard processes for corner definition, quality metrics, and data consistency across IPs and programs. * Lead debug, validation, and continuous improvement efforts by root-causing mismatches between SPICE, extracted views, STA, and silicon behavior. Develop metrics, dashboards, and automated checks to ensure completeness, adaptability, and quality of characterization data, enabling reliable signoff and scalable deployment across future HBM programs. ## Related Videos - [Guiding Agentic AI with Vue](https://www.wearedevelopers.com/videos/2033-guiding-agentic-ai-with-vue) - [JavaScript? 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