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# FPGA Digital Engineer - 2

- **Company:** Northrop Grumman
- **Location:** Chandler, AZ, United States
- **Salary:** $87,200.0 - $130,800.0
- **Contract:** Internship / Graduate position
- **Skills:** C++ (Programming Language), Configuration Management, Computer Engineering, Software Debugging, Programming Tools, Digital Electronics, Embedded C, Ethernet, Formal Verification, Field-Programmable Gate Array (FPGA), Hardware Description Language, PCI Express, Systems Development Life Cycle, Signal Integrity, Universal Asynchronous Receiver/Transmitter, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, ModelSim, Hardware Debugging
- **Published:** August 1, 2026
- **Apply:** https://dejobs.org/x/x/AD566A0A4FE54855B1E190EEC9D957EC/job/

## About the Role

* Bachelor's degree in Electrical Engineering, Computer Engineering, or related discipline from an accredited university and 2 years of relevant experience; or a Master's degree.
 * Ability to obtain a U.S. Government Department of Defense (DoD) Secret security clearance at the time of application.
 * Internship, co-op, or academic project experience with FPGAs, SoCs, or digital hardware (VHDL preferred, or Verilog).
 * Exposure to AMD Xilinx FPGAs and SoCs (academic or project experience acceptable).
 * Familiarity with managing design constraints (timing, power, I/O) and using development tools such as Vivado IDE.
 * Exposure to the development, verification, or debugging of digital interfaces/buses (such as Ethernet, PCIe, AXI4, UART, SDLC) via coursework or projects.
 * Familiarity with simulation tools (Questa/ModelSim) or basic hardware debugging tools (logic analyzers, oscilloscopes).
 * Experience developing or running verification plans using simulation, analysis, or hardware bench testing from coursework or internships., * Master's degree in Electrical Engineering, Computer Engineering, or related discipline.
 * Active U.S. Government DoD Secret security clearance at the time of application.
 * Direct experience with missile systems, seeker systems, or other high reliability, environmentally challenging electro optical applications (academic or internship).
 * Familiarity with AMD Xilinx Versal FPGAs/SoCs.
 * Exposure to Vitis Unified IDE and memory interface standards (DDR3/DDR4/DDR5).
 * Coursework or project experience with embedded C/C++ programming.
 * Understanding of OSVVM or UVM verification methodologies.
 * Interested in high-speed PCB design and signal integrity.

## Description

* Work under supervision to assist senior FPGA engineers and multidisciplinary teams in resolving design and integration challenges.
 * Participate in the development and execution of test benches to verify FPGA designs for functional and timing requirements.
 * Support generating, verifying & integrating IO and image processing HDL modules. including functions definitions, HDL coding, module level sim and integration with overall device architecture
 * Prepare, organize, and maintain design documentation, including schematics, simulation results, and verification reports with oversight.
 * Support configuration management of FPGA bitstream builds as directed.
 * Contribute to ensuring compliance with internal design standards throughout the development lifecycle.
 * Continue developing technical knowledge of evolving FPGA technologies, tools, and industry methodologies.


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