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# CPU Design Timing Engineer

- **Company:** Apple Inc.
- **Location:** Santa Clara, CA, United States
- **Experience:** Experienced
- **Contract:** Permanent contract
- **Skills:** Computer-Aided Design, Digital Arts, Logic Synthesis of Circuits, Microprocessors, Perl (Programming Language), Python (Programming Language), CPU Design, Static Timing Analysis, Tcl (Programming Language), Physical Design
- **Published:** September 2, 2026
- **Apply:** https://www.techcareers.com/job.asp?id=3373897072&tx=CT2826TYT&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* Minimum BS and 3+ years of relevant experience
 * Experience with static timing analysis, noise analysis, and fixing noise in designs
 * Experience with variation modeling
 * Experience with TCL and either Perl or Python, * Prior experience performing timing analysis in high speed digital designs such as CPUs or other similar designs
 * Experience in a static timing analysis tool such as PrimeTime/Tempus
 * Knowledge of physical design tools and methodology including logic synthesis, PnR, parasitic extraction, and logic equivalence
 * Understanding of deep sub-micron technologies and scaling trends
 * Working knowledge of CPU microarchitecture
 * Possess data parsing, analysis and representation/plotting skills

## Description

In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure., As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project., * Working with the CAD team to develop the timing flow that will be used on the project including scripting to improve analysis flows and engineer efficiency.

 * Work extensively with CPU micro-architects and Implementation engineers to drive timing closure for the CPU.


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