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# Principal Device Design & Integration Engineer

- **Company:** Renesas Electronics America Inc.
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $180,000.0 - $230,000.0
- **Contract:** Permanent contract
- **Skills:** Software Debugging, Desktop Publishing, Service-Oriented Architecture, System-level Testing, Pcb Layout
- **Published:** September 3, 2026
- **Apply:** https://www.wayup.com/i-j-Principal-Device-Design-Integration-Engineer-Renesas-Electronics-885396542272125/

## About the Role

+ Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or related field.
 + 10+ years of hands-on design experience in power semiconductor devices, analog/power ICs, or power electronics.
 + Strong working knowledge of power conversion topologies (e.g., buck, boost, multiphase/interleaved converters, half-bridge, DrMOS/Intelli-Phase-style architectures) and how topology choices drive device requirements.
 + Solid understanding of power device physics and tradeoffs across BCD process technologies and GaN (particularly low-voltage GaN HEMTs) - including RDS(ON), switching loss, gate charge, breakdown/avalanche behavior, and thermal characteristics.
 + Demonstrated experience designing test structures or test chips/vehicles for process technology development (not just product design) - comfortable defining what a process node needs to prove out.
 + IC-level design and layout experience, including parasitic-sensitive layout practices for high-current switching nodes.
 + Experience taking designs beyond the die level to module, package, or board level (e.g., power module co-design, evaluation board layout, thermal/electrical co-design).
 + Proficiency with circuit simulation tools (SPICE or equivalent) and familiarity with device/TCAD simulation concepts.
 + Ability to interpret and specify absolute maximum ratings, transient voltage tolerance, and protection thresholds (OVP/UVP/OCP/OTP) relevant to power stage reliability.
 + Strong lab skills: bring-up, debug, and characterization using oscilloscopes, curve tracers, power analyzers, and thermal imaging.

## Description

We are seeking a Design Engineer to lead the development of test vehicles supporting our high-current BCD (Bipolar-CMOS-DMOS) and low-voltage GaN power process and product portfolios. This role owns test vehicle definition, circuit and layout design, and characterization planning from concept through silicon bring-up, working closely with process development, product engineering, and applications teams. The ideal candidate has hands-on experience designing power devices and circuits at both the IC and module level, and is fluent in the power topologies these test vehicles are ultimately intended to support.
Key Responsibilities

 + Define, design, and drive execution of test vehicles (TVs) for high-current BCD and LV GaN process technologies, including device test structures, scaled power stages, and full-function demonstration circuits.
 + Translate process capability targets and product roadmap requirements into test vehicle architecture and specifications.
 + Design and simulate power stage circuits (e.g., synchronous buck/boost, multiphase, half-bridge/DrMOS, gate drivers) used to validate device performance under realistic switching and thermal conditions.
 + Select and characterize power devices (LDMOS, trench MOSFETs, LV GaN HEMTs, Schottky/sync rectifiers) for inclusion in test structures, working with device/process engineering on layout-dependent tradeoffs (RDS(ON), Qg, breakdown voltage, SOA).
 + Perform IC-level layout and design for test structures, including parasitic-aware layout for switch nodes, current sensing, and gate drive paths.
 + Extend designs to module/package level as needed - co-design of power stages with packaging, magnetics, and PCB layout for evaluation boards and system-level test vehicles.
 + Develop test and characterization plans covering DC parametrics, switching performance, efficiency, transient response, and voltage/current stress margins (including switch-node ringing and abs-max validation).
 + Lead or support silicon bring-up, debug, and correlation of measured results against simulation and design targets.
 + Collaborate cross-functionally with process integration, reliability, product/applications engineering, and test engineering to close the loop from process split data to product-ready specifications.
 + Document design methodology, test vehicle results, and characterization data to support technology qualification and product development decisions.


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