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# Graphics FE Implementation Engineer

- **Company:** Apple Inc.
- **Location:** Austin, TX, United States
- **Experience:** Experienced
- **Salary:** $150,400.0
- **Contract:** Permanent contract
- **Skills:** Static Timing Analysis, SystemVerilog, Verilog, Scripting, Code Inspection, Physical Design
- **Published:** September 3, 2026
- **Apply:** https://www.themuse.com/jobs/apple/graphics-fe-implementation-engineer-dfb4c7

## About the Role

Understanding and application of physical design (PD) and static timing analysis (STA) principles

Ability to analyze critical paths and guide RTL designs to optimal solutions

Collaborate effectively with IP teams spanning multiple sites

Familiarity with DFT insertion

Familiarity with reset domain, multi-clock domain, multi-power domain (UPF), linting tools and concepts across RTL and Gate-Level

Experience implementing ECOs for functionality and timing, Experience with physical synthesis, including logic and PPA optimization techniques, Experience with Verilog, System Verilog or other scripting languages

Experience using logic equivalence tools for RTL and Gate-level designs

BS + 3 years of relevant experience

## Description

Candidates will be responsible for PPA optimization of the netlist, working collaboratively with the RTL and Physical design teams. You will also deliver key netlist quality milestones for your partition and be involved in understanding and improving our current methodologies. Through this collaboration, you will deliver the best-in-class GPU's for the best consumer products. If you're ready to help chart the future of Apple Silicon, we'd love to talk to you.


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