> Markdown version of [/jobs/ext/2703980-design-verification-architect](https://www.wearedevelopers.com/jobs/ext/2703980-design-verification-architect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Design Verification Architect - **Company:** Moore's Law - **Location:** San Jose, CA, United States (Remote available) - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Big Data, Code Coverage, Communications Protocols, Computer Engineering, Software Debugging, Emulators, Ethernet, Machine Learning, PCI Express, SystemVerilog, AI Infrastructure, Physical Design - **Published:** September 4, 2026 - **Apply:** https://startup.jobs/design-verification-architect-tylsemi-8346894 ## About the Role If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits., * Bachelor's/Master's degree in Electrical Engineering, Computer Engineering, or related field * 12+ years of experience in Design Verification, with significant exposure to large SoC verification * Proven experience in defining and deploying verification architectures for complex chips * Strong expertise in: * SystemVerilog and UVM * Coverage-driven verification (functional + code coverage) * Assertion-based verification (SVA) * Hands-on experience with Portable Stimulus (PSS) and cross-level stimulus reuse * Deep understanding of SoC architectures in AI, HPC, or Networking domains * Experience with multi-IP integration challenges, coherency, high-speed interfaces, and large-scale data movement * Strong debugging skills and ability to handle complex system-level issues, * Experience with AI/ML applications in verification workflows * Exposure to emulation, prototyping, or hybrid verification platforms * Familiarity with performance verification and power-aware verification * Knowledge of industry-standard protocols (e.g., PCIe, DDR, Ethernet, CXL, UCIe) * Experience building verification frameworks reused across multiple tape-outs Key Attributes * Strong architectural thinking with a systems-level mindset * High ownership with a quality-first approach * Bias toward automation, reuse, and scalability * Passion for adopting cutting-edge technologies, especially AI-driven verification * Ability to operate in a fast-paced environment with a fail-fast, learn-fast attitude * Excellent collaboration and leadership skills Success in This Role Looks Like * High degree of verification reuse across programs * Achievement of coverage and quality goals within schedule * Reduction in verification cycle time through automation and AI * Strong track record of first-time silicon success * Minimal post-silicon escapes and debug cycles ## Description * No endless meetings, no PowerPoint presentations to convince middle management., We are seeking a highly experienced Design Verification Architect to lead the definition and execution of scalable, reusable, and high-quality verification strategies for next-generation SoCs targeting AI, HPC, and Networking applications. This role requires deep expertise in verifying large and complex SoCs and a passion for building next-gen verification platforms, leveraging automation, portability, and AI-driven methodologies. What You'll Do * Define and drive the overall verification architecture for large-scale SoCs, ensuring scalability from IP * subsystem * full SoC level * Architect and develop reusable, modular, and portable verification platforms that can be leveraged across multiple chip programs * Establish methodologies for seamless reuse and portability, including Portable Stimulus (PSS)-based verification flows * Lead the development of high-performance, coverage-driven testbenches using industry-standard methodologies (e.g., UVM) * Drive multi-level verification strategies, enabling efficient scaling across: * Block-level, Multi-block/subsystem level, Full-chip SoC level * Define and enforce verification quality metrics, coverage closure strategies, and sign-off criteria * Champion a "fail-fast" philosophy to detect issues early and improve overall design quality * Drive initiatives toward first-pass silicon success, minimizing escapes and post-silicon debug effort * Leverage AI/ML techniques and AI agents to: * Automate testbench generation * Improve stimulus generation and coverage closure * Enhance regression efficiency and debug productivity * Enable intelligent verification QA and anomaly detection * Collaborate closely with design, architecture, physical design, and software teams to ensure alignment and early issue detection * Mentor and guide DV teams on best practices, methodology adoption, and architectural decisions ## Related Videos - [You don't need to write the code. You need to become a verification architect and prove it's correct](https://www.wearedevelopers.com/videos/100023-you-don-t-need-to-write-the-code-you-need-to-become-a-verification-architect-and-prove-it-s-correct) - [Thinking Differently - How to Make Money from Cyber Attacks & Cheats](https://www.wearedevelopers.com/videos/745-thinking-differently-how-to-make-money-from-cyber-attacks-cheats) - [The Gashlycrumb Tinies of AI Networking You Must Know (or Languish!)](https://www.wearedevelopers.com/videos/2067-the-gashlycrumb-tinies-of-ai-networking-you-must-know-or-languish) - [Alibaba Big Data and Machine Learning Technology](https://www.wearedevelopers.com/videos/37-alibaba-big-data-and-machine-learning-technology) - [Building a hypercar from scratch](https://www.wearedevelopers.com/videos/607-building-a-hypercar-from-scratch) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) ## Related Articles - [Navigating the AI Shift](https://www.wearedevelopers.com/magazine/629-navigating-the-ai-shift) - [Never delegate the understanding](https://www.wearedevelopers.com/magazine/749-never-delegate-the-understanding) - [How software is steering vehicle technology](https://www.wearedevelopers.com/magazine/515-how-software-is-steering-vehicle-technology) - [How to Become an AI Engineer](https://www.wearedevelopers.com/magazine/331-how-to-become-an-ai-engineer) - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated)