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# Engineer, CPU RTL Design

- **Company:** Tenstorrent Usa, Inc.
- **Location:** Austin, TX, United States
- **Experience:** Expert
- **Salary:** $100,000.0
- **Contract:** Permanent contract
- **Skills:** Software Debugging, CPU Design, Open Source Technology, Reduced Instruction Set Computing, Verilog, VHSIC Hardware Description Language (VHDL), Power Analysis (Cryptography)
- **Published:** September 4, 2026
- **Apply:** https://startup.jobs/sr-engineer-cpu-rtl-design-tenstorrent-company-8293410

## About the Role

* Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath.
 * Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis.
 * Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments.
 * Background in microarchitecture definition, design specification, and performance-driven trade-off analysis.

## Description

* Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU.
 * Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals.
 * Use innovative techniques to optimize power, performance, and area while driving RTL experiments and evaluating results.
 * Partner with validation and test teams to ensure robust pre-silicon and post-silicon execution.
 * Enhance RTL design environment, tools, and methodologies to improve development efficiency.

What You Will Learn

 * End-to-end exposure to CPU design from microarchitecture through timing and power convergence.
 * Hands-on experience optimizing high performance CPU designs in both pre-silicon and post-silicon phases.
 * Integration of open-source and industry-standard tools to improve RTL flows and results.
 * Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges.


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