> Markdown version of [/jobs/ext/2716300-cpu-implementation-engineer](https://www.wearedevelopers.com/jobs/ext/2716300-cpu-implementation-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# CPU Implementation Engineer

- **Company:** Apple Inc.
- **Location:** Austin, TX, United States
- **Contract:** Permanent contract
- **Skills:** Computer-Aided Design, Big Data, Computer Engineering, Software Debugging, Logic Synthesis of Circuits, Python (Programming Language), Tcl (Programming Language), Verilog, Reliability of Systems, Physical Design
- **Published:** September 4, 2026
- **Apply:** https://www.austinjobsite.com/job.asp?id=3377280956&tx=ZT2726THI&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* Master's degree or foreign equivalent in Computer Engineering, or related field.
 * Experience and/or education must include:
 * Experience with top level and block level IR drop analysis with static and dynamic vectors in digital silicon circuits
 * Experience with signal and power electromigration related reliability analysis in digital silicon circuits
 * Debugging high IR drop and EM violations and directing physical design teams on circuit layout improvements
 * Developing and applying custom scripts in Python and TCL to automate IR, SIGEM, and reliability analysis workflows
 * Designing power delivery networks in deep submicron silicon technologies from package to active transistor gate level for very large-scale digital silicon designs
 * Providing detailed design reviews and documentation for tapeout signoff of or EMIR related items in digital design
 * Understanding of very large-scale digital design construction from Verilog synthesis to design route/closure (also called SAPR or PNR digital design flows)

## Description

APPLE INC has the following available in Austin, Texas. Perform block-level and top-level EMIR (Electromigration and IR Drop) analysis to identify electrical weaknesses in the power delivery network and ensure design reliability for high performance compute blocks. Conduct power grid design, optimization, and verification using industry-standard physical design (PNR) tools, ensuring robust power delivery and minimal voltage drop across the design. Develop and apply custom scripts in Python and TCL to automate EMIR, SIGEM (Signal EM), and reliability analysis workflows, enabling efficient debugging and large-scale data processing. Investigate and debug high IR drop and EM violations by tracing metal layers, via structures, and current paths, collaborating with physical design teams to suggest layout improvements. Work closely with CAD and EDA vendors to validate tool results, resolve tool-related issues, and incorporate enhancements for accurate EMIR/SIGEM signoff. Collaborate with
methodology and implementation teams to support corner-case analysis, refine design guidelines, and ensure alignment on timing, routing, and physical constraints. Provide detailed design reviews and documentation for signoff, highlighting analysis outcomes, coverage metrics, and any risk areas requiring further optimization. Coordinate with SoC-level integration teams to ensure successful block delivery, maintain alignment on power integrity goals, and meet project milestones and tape-out schedules. 40 hours/week.


## Related Videos

- [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right)
- [Alibaba Big Data and Machine Learning Technology](https://www.wearedevelopers.com/videos/37-alibaba-big-data-and-machine-learning-technology)
- [Building a fully automated escape room](https://www.wearedevelopers.com/videos/735-building-a-fully-automated-escape-room)
- [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age)
- [PySpark - Combining Machine Learning & Big Data](https://www.wearedevelopers.com/videos/44-pyspark-combining-machine-learning-big-data)
- [Designing for Every Direction: Logical CSS for Global, Adaptive, and Effortlessly Reversible UIs](https://www.wearedevelopers.com/videos/2026-designing-for-every-direction-logical-css-for-global-adaptive-and-effortlessly-reversible-uis)

## Related Articles

- [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers)
- [Data Science & more: The Lopez dilemma](https://www.wearedevelopers.com/magazine/10-data-science-more-the-lopez-dilemma)
- [What is Software Engineering?](https://www.wearedevelopers.com/magazine/289-what-is-software-engineering)
- [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline)
- [Dev Digest 118 - not a total recall](https://www.wearedevelopers.com/magazine/452-dev-digest-118-not-a-total-recall)
- [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again)