> Markdown version of [/jobs/ext/2717107-firmware-embedded-software-architecture-leadership](https://www.wearedevelopers.com/jobs/ext/2717107-firmware-embedded-software-architecture-leadership). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Firmware & Embedded Software Architecture Leadership - **Company:** Moore's Law - **Location:** San Jose, CA, United States (Remote available) - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Advanced Configuration and Power Interface (ACPI), Application Programming Interfaces (APIs), ARM Architecture, BIOS, Computer Engineering, Software Debugging, Microprocessors, Embedded Software, Firmware, Joint Test Action (IEEE Standards), Key Management, PCI Express, Requirements Traceability, Reduced Instruction Set Computing, Software Engineering, AI Infrastructure, Extensible Firmware Interface, State Machines, Information Technology - **Published:** September 4, 2026 - **Apply:** https://startup.jobs/firmware-architect-tylsemi-8606492 ## About the Role If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits., * BS/MS in Electrical / Computer Engineering or Computer Science * 12+ years of embedded firmware development, with at least 5 years in silicon-level bring-up and validation of high-speed interface IPs. * Working knowledge of design verification (DV) and HW/SW co-simulation / co-verification flows, and the ability to define a unified firmware + DV test flow with a single source of truth. * Expert-level C and assembly for resource-constrained embedded CPUs (RISC-V or Arm Cortex-M/R class); strong debugging skills using JTAG/OpenOCD, trace, and logic analysers. * Deep PCIe expertise: link-training state machine, equalization, speed-change sequences, LTSSM register-level behaviour. * Hands-on experience with HPC compute SoC firmware ecosystems - UEFI/BIOS bring-up, ACPI table authoring, SMBus/I2C/MCTP platform management, VT-d/IOMMU configuration - on HPC platforms. * Solid understanding of x86 server platform boot flow: PCIe enumeration, ROM interaction, and PCIe error-recovery paths (AER, DPC). * Experience with secure-boot architectures, code-signing flows, and OTA update mechanisms on embedded targets. * Comfortable working at the hardware-software boundary: reading RTL, memory-mapped register specs, and waveforms from simulation or a logic analyser. Good To Have * CXL 2.0/3.0 firmware experience: HDM decoder programming, CXL IDE, DVSEC, BISnp coordination. * UCIe / die-to-die sideband firmware experience (RDI/FDI parameter negotiation, sideband messaging). * SPDM (DSP0274) and CMA device-attestation implementation experience. * Familiarity with PLDM for firmware update (DSP0267) and platform telemetry (DSP0248). * ATE scripting background - Teradyne UltraFLEX / Advantest T2000 board-level bring-up scripts. * Exposure to chiplet packaging concepts (UCIe, EMIB, CoWoS) and multi-die power-sequencing considerations. * Kernel-mode driver or UEFI DXE driver development experience. ## Description * No endless meetings, no PowerPoint presentations to convince middle management., * Own the end-to-end firmware/embedded-software architecture for TYLsemi chiplets. * Define the firmware/hardware interface together with the Chip Architects for a seamless HW-to-SW handoff; define the MCU subsystem (MCU SS) architecture from the firmware point of view; and define the chip's debug interface and debug features. * On-die: boot and secure boot, link sequencing, PCIe/CXL controller configuration and enumeration, address-translation (NTB/ATT) setup, MSI-X and AER handling, reset/FLR, power management, telemetry, and in-field firmware update. * Host-side: kernel drivers, the device-virtualization/transparency shim (synthetic PCIe device, VFIO-mdev-class), management libraries/APIs, and IOMMU (VT-d/SMMU) coordination. * Define the hardware/software boundary with architecture and RTL - datapath (credit, ordering, merge/split, address-translation execution) in RTL; control plane in firmware - and own register maps and UCIe sideband/mailbox protocols. * Define a unified flow for firmware development and DV test cases, with a single source of truth shared across firmware and DV (register models, stimulus, and sequences), and drive HW/SW co-verification. * Stay hands-on through first silicon. Bring-up, Methodology & Quality * Drive pre-silicon firmware and host-software development on emulation, and virtual platforms, and lead post-silicon bring-up and debug. * Stand up the firmware engineering infrastructure: CI, automated and HIL testing, requirements traceability, secure-development practices (secure boot, attestation, key management), and the RAS/error-handling and fault-attribution strategy. * Define firmware release, quality, and security criteria across products and customers. Cross-functional & Customer Collaboration * Be the technical bridge between firmware/software and architecture, RTL, DV, PHY/IP vendors and program management - bringing software feasibility into hardware decisions early. * Work directly with customers: compute-SoC partners on PCIe/CXL enablement, ATE/SLT integrators on the firmware and management libraries. Technical Leadership & Ownership * Set technical direction, roadmap, and clear subsystem ownership (boot/security, PCIe/CXL management, host drivers and virtualization, RAS/telemetry). ## Related Videos - [Unleashing the Full Potential of the Arm Architecture – Write Once, Deploy Anywhere](https://www.wearedevelopers.com/videos/940-unleashing-the-full-potential-of-the-arm-architecture-write-once-deploy-anywhere) - [10M Data Records Lost, Underwater Computing, and Psychedelic Fish - Matthias Geniar](https://www.wearedevelopers.com/videos/1908-10m-data-records-lost-underwater-computing-and-psychedelic-fish-matthias-geniar) - [Playing Pong on a shoulder press machine](https://www.wearedevelopers.com/videos/100140-playing-pong-on-a-shoulder-press-machine) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [How to Submit CFPs and Get into Public Speaking - Moran Weber](https://www.wearedevelopers.com/videos/2112-how-to-submit-cfps-and-get-into-public-speaking-moran-weber) - [Agent Smith Gets Hardware: Autonomous IoT Hacking From Debug Port to Cloud API](https://www.wearedevelopers.com/videos/100258-agent-smith-gets-hardware-autonomous-iot-hacking-from-debug-port-to-cloud-api) ## Related Articles - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [How software is steering vehicle technology](https://www.wearedevelopers.com/magazine/515-how-software-is-steering-vehicle-technology) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Dev Digest 134 - Where pixels sing?](https://www.wearedevelopers.com/magazine/477-dev-digest-134-where-pixels-sing) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Dev Digest 138 - Are you secure about this?](https://www.wearedevelopers.com/magazine/486-dev-digest-138-are-you-secure-about-this)