> Markdown version of [/jobs/ext/2717594-design-verification-architect](https://www.wearedevelopers.com/jobs/ext/2717594-design-verification-architect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Design Verification Architect - **Company:** CareerCircle - **Location:** Morrisville, NC, United States - **Salary:** $150,000.0 - $250,000.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Software Debugging, Perl (Programming Language), Embedded Software, Firmware, Python (Programming Language), Object-Oriented Software Development, Shell Script, SystemVerilog, Tcl (Programming Language), AI Infrastructure, Scripting, Direct Programming Interface, Build Management, Infrastructure Automation Frameworks - **Published:** September 4, 2026 - **Apply:** https://www.careercircle.com/jobs/all/all/usa/nc/morrisville/2891f2bf-0548-488a-bc1d-4d0d985dd845 ## About the Role Equities Debugging Scripting Telemetry Visionary Management Automation Mentorship Innovation Scalability Simulations Shell Script Communication Test Planning Analog Design Semiconductors Decision Making Control Systems Embedded Systems Power Management Embedded Software Embedded Firmware Voltage Regulator Influencing Skills Voltage Regulation Electronic Circuits Behavioral Modeling Technical Leadership Requirements Analysis Artificial Intelligence Engineering Design Process Tcl (Programming Language) Perl (Programming Language) Python (Programming Language) Influencing Without Authority Hardware Verification Language Object-Oriented Programming (OOP), Design verification, UVM, systemverilog, power management, python, tcl, perl, * Extensive semiconductor verification experience, typically gained through 10 or more years in increasingly complex technical roles, or an equivalent level of demonstrated expertise. * Experience operating at a Staff, Principal, Architect, or Technical Lead level. * A proven track record of personally architecting and building multiple UVM verification environments from scratch. * Deep expertise in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and coverage closure. * Strong understanding of the complete verification lifecycle, from requirements analysis and test planning through regression and signoff. * Experience verifying complex mixed-signal ICs or systems involving tightly coupled analog and digital functionality. * Practical experience with AMS, DMS, RNM, behavioral modeling, or comparable mixed-signal verification methodologies. * Experience integrating embedded firmware or processor-driven functionality into hardware verification environments. * Understanding of embedded processor architectures and hardware-software interaction. * Strong communication, collaboration, mentorship, and technical decision-making skills., * Experience verifying power management ICs, voltage regulators, DC/DC converters, multi-phase control systems, power sequencing, protection circuitry, or related architectures. * Experience delivering mixed-signal verification within a complex semiconductor product environment. * Familiarity with leading simulation, mixed-signal, waveform-debug, and analog-design platforms. * Experience applying digital mixed-signal and real-number modeling techniques. * A history of developing reusable verification frameworks that support multiple products or engineering teams. * Proficiency with scripting and automation tools such as Python, Perl, Tcl, shell scripting, or Make. * Experience mentoring engineers and providing technical leadership across complex verification programs., Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors., Morrisville, NC*On-Site Firmware Equities Debugging Scripting Telemetry Visionary Management Automation Mentorship Innovation Scalability Simulations Shell Script Communication Test Planning Analog Design Semiconductors Decision Making Control Systems Embedded Systems Power Management Embedded Software Embedded Firmware Voltage Regulator Influencing Skills Voltage Regulation Electronic Circuits Behavioral Modeling Technical Leadership Requirements Analysis Artificial Intelligence Engineering Design Process Tcl (Programming Language) Perl (Programming Language) Python (Programming Language) Influencing Without Authority Hardware Verification Language Object-Oriented Programming (OOP) Artificial Intelligence Infrastructure SystemVerilog (Direct Programming Interface) +0 ## Description We are partnering with a rapidly growing semiconductor organization that is making a significant investment in next-generation power delivery technologies for AI infrastructure, high-performance computing, and intelligent edge systems. This role offers the opportunity to serve as a technical leader within a newly established U.S. engineering center, helping define verification methodology and architecture for complex mixed-signal power management ICs. The successful candidate will drive the development of advanced UVM-based verification environments from the ground up, collaborate closely with analog, digital, firmware, and system architects, and influence verification strategy across multiple high-impact products. Beyond hands-on technical leadership, this position provides a rare opportunity to build scalable verification infrastructure, mentor engineers, and shape the long-term direction of a growing verification organization. Ideal candidates will have a track record of architecting verification environments from scratch, driving coverage closure, and solving challenging verification problems at the system, subsystem, and block levels. Core Responsibilities Verification Architecture and Ownership * Own the verification architecture and strategy for complex mixed-signal and power management ICs. * Design and build advanced UVM verification environments from the ground up, including testbench architecture, reusable components, stimulus generation, scoreboards, assertions, coverage models, and regression infrastructure. * Define scalable verification methodologies that can be applied across multiple products and development programs. * Establish verification plans spanning the block, subsystem, and full-chip levels. * Lead verification from early requirements and test planning through regression, coverage closure, and tape-out readiness. UVM and SystemVerilog Development * Develop sophisticated, coverage-driven verification environments using SystemVerilog, UVM, and object-oriented methodologies. * Create reusable agents, monitors, drivers, scoreboards, protocol checkers, assertions, and functional coverage models. * Develop constrained-random stimulus and comprehensive test strategies for complex operating modes, interactions, and corner cases. * Establish efficient regression, debug, and failure-analysis methodologies. * Provide technical direction when resolving challenging verification issues across digital and analog domains. Mixed-Signal and Firmware Verification * Develop verification strategies that validate the interaction between digital RTL, analog behavioral models, embedded firmware, and system-level functionality. * Integrate embedded software into UVM-based environments to validate hardware and firmware behavior prior to silicon. * Build co-simulation environments for processor-based and mixed-signal architectures. * Partner with firmware and design teams to identify interface risks, system-level corner cases, and potential failure conditions early in the development lifecycle. * Apply AMS, DMS, RNM, or comparable methodologies to improve verification speed, scalability, and coverage. Power Management IC Verification * Apply verification expertise to sophisticated power management functions such as voltage regulation, power sequencing, multi-phase control, monitoring, telemetry, and protection features. * Collaborate closely with analog and digital designers to understand circuit behavior, operating modes, transient conditions, and failure mechanisms. * Translate system and circuit-level requirements into meaningful verification scenarios rather than relying solely on traditional digital verification approaches. * Develop verification strategies that accurately represent real-world power-management behavior and system interactions. ## Related Videos - [You don't need to write the code. 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