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# ML Systems Engineer - Inference Acceleration

- **Company:** Arago
- **Location:** Courbevoie, France
- **Contract:** Permanent contract
- **Skills:** Computer-Aided Design, C++ (Programming Language), Nvidia CUDA, Computer Programming, Extract Transform Load (ETL), Python (Programming Language), System Programming, Large Language Models, Caching, Parallel Computation, Machine Learning Operations, TensorRT
- **Published:** September 5, 2026
- **Apply:** https://startup.jobs/ml-systems-engineer-inference-acceleration-arago-9013268

## About the Role

* Strong experience in high-performance ML inference, GPU/accelerator programming, or ML systems engineering.
 * Deep understanding of computer architecture, accelerator/GPU execution models, memory hierarchies, parallelism, and performance bottlenecks.
 * Experience developing and optimizing custom kernels using CUDA, Triton, ROCm/HIP, or equivalent low-level programming environments.
 * Experience with operator fusion, tiling, scheduling, data movement optimization, graph execution, and profiling of compute- and memory-bound workloads.
 * Strong understanding of distributed model execution, including tensor, pipeline, sequence, and/or expert parallelism and communication/computation overlap.
 * Hands-on experience with modern inference-serving systems such as vLLM, SGLang, TensorRT-LLM, or equivalent, including KV-cache management, continuous batching, paged attention, and prefill/decode scheduling.
 * Strong C++ and Python skills, and comfort working on a custom accelerator stack where compiler, runtime, kernels, and abstractions are actively being developed. Exposure to or experience with MLIR and MLIR dialects is a strong plus.
 * Language: English at a proficient level.

## Description

* Analyze modern AI workloads and identify kernel-, runtime-, memory-, and system-level bottlenecks on Arago's accelerator.
 * Develop and optimize custom kernels, fused operators, and execution strategies to maximize device utilization.
 * Design efficient mappings of models and operators across multiple Arago devices, including communication and synchronization strategies.
 * Develop inference-serving techniques such as continuous batching, paged KV caches, prefix/context caching, chunked prefill, and prefill/decode interleaving or disaggregation.
 * Build profiling, benchmarking, and performance-analysis infrastructure spanning kernels, full models, and serving workloads.
 * Work closely with Arago's hardware, compiler, and runtime teams to co-design software abstractions and influence future hardware features based on real model workloads.


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