> Markdown version of [/jobs/ext/2732726-physical-design-implementation-lead](https://www.wearedevelopers.com/jobs/ext/2732726-physical-design-implementation-lead). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# Physical Design / Implementation Lead

- **Company:** Neurophos Inc.
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Logic Synthesis of Circuits, Backend, Physical Verification, Hardware Acceleration, Physical Design
- **Published:** September 5, 2026
- **Apply:** https://startup.jobs/physical-design-implementation-lead-neurophos-9892751

## About the Role

* Track record leading physical design / implementation on large, complex SoCs through tapeout: as a back-end lead on a large SoC, or an equivalent composite of synthesis, timing closure, power, and physical-verification ownership at a senior level.
 * Hands-on experience on advanced nodes; TSMC N3 strongly preferred, FinFET-class node experience (7nm-3nm) required.
 * Deep power and clock design experience at scale, ideally from CPU-class or very large SoC work.
 * A track record of leading and growing a team.

Preferred Skills

 * Experience integrating analog/mixed-signal blocks into a digital implementation flow.
 * Cadence toolchain experience.

## Description

We're hiring the first permanent Physical Design / Implementation Lead for the digital design team. This is a build role: you'll be responsible for all aspects of the SoC implementation process. Responsibilities include building and managing a multi-site team to deliver optimized GDSII implementations on subsystem and SoC levels across a variety of planar, FinFet and GAA technologies. You will define how we take designs from RTL to tapeout on leading-edge nodes, and grow the team under you. You'll be one of three discipline leads, alongside RTL and DV, who together own how digital chips get built at Neurophos., * Own physical design and implementation end-to-end, from synthesis through tapeout, on leading-edge process nodes (TSMC N3 strongly preferred; deep FinFET-class experience, 7nm-3nm, required).

 * Optimize and automate our synthesis flow, and lead the intake of new process technology as we bring on new nodes.
 * Optimize and automate the timing closure process at the block and subsystem level
 * Design and optimization of power and clock architecture distribution networks.
 * Own the integration of analog/mixed-signal components into the digital implementation flow, building the process and working relationship between analog and digital teams.
 * Own physical verification and IP/library management for the digital design org.
 * Build and lead a physical design team: hire, ramp, and manage the engineers under you as the group scales.
 * Work closely with the RTL/DV, Analog and other team leads on cross-functional flow and schedule decisions.


## Related Videos

- [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right)
- [Unboxing the DeepFace](https://www.wearedevelopers.com/videos/335-unboxing-the-deepface)
- [Building a fully automated escape room](https://www.wearedevelopers.com/videos/735-building-a-fully-automated-escape-room)
- [Developing the Backend with Stefan Lingler, CTO at Shpock](https://www.wearedevelopers.com/videos/100360-developing-the-backend-with-stefan-lingler-cto-at-shpock)
- [The Neuro-Architecture of Productivity: How Work Environments Impact Cognitive Performance](https://www.wearedevelopers.com/videos/1122-the-neuro-architecture-of-productivity-how-work-environments-impact-cognitive-performance)
- [Designing for Every Direction: Logical CSS for Global, Adaptive, and Effortlessly Reversible UIs](https://www.wearedevelopers.com/videos/2026-designing-for-every-direction-logical-css-for-global-adaptive-and-effortlessly-reversible-uis)

## Related Articles

- [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again)
- [Everything a Developer Needs to Know About MCP with Neo4j](https://www.wearedevelopers.com/magazine/604-everything-a-developer-needs-to-know-about-mcp-with-neo4j)
- [AI Eats the Verifiable First](https://www.wearedevelopers.com/magazine/765-ai-eats-the-verifiable-first)
- [Declarative Design and a fresh take on collaboration with developers](https://www.wearedevelopers.com/magazine/595-declarative-design-and-a-fresh-take-on-collaboration-with-developers)
- [Best US AI Conferences for CTOs in 2026: Build vs. Buy, Vendor Evaluation, and Peer Intelligence](https://www.wearedevelopers.com/magazine/736-best-us-ai-conferences-for-ctos-in-2026-build-vs-buy-vendor-evaluation-and-peer-intelligence)
- [Should Tech Managers Be Developers First? Pros and Cons](https://www.wearedevelopers.com/magazine/327-should-tech-managers-be-developers-first-pros-and-cons)