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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Lead Systems Architect - **Company:** Axiado Corp - **Location:** San Jose, CA, United States - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Bash Shell, Computer Programming, Computer Engineering, Microarchitecture, Data Centers, Linux, Device Drivers, Dynamic Random-Access Memory, Embedded Software, Ethernet, Firmware, Hardware Platform Interface, Hardware Security Module, Python (Programming Language), Linux Kernel, Linux-Powered Devices, Open Source Technology, OrCAD, PCI Express, Real-Time Operating Systems, Schematic Capture, Server Administration, Signal Integrity, Systems Architecture, System on a Chip, System Software, Universal Asynchronous Receiver/Transmitter, USB, Serial Peripheral Interface, Application Specific Integrated Circuits, Information Technology, Nvme - **Published:** September 5, 2026 - **Apply:** https://startup.jobs/lead-systems-architect-axiado-com-9862558 ## About the Role * Experience: 10+ years of dedicated system architecture experience spanning SoC design, board development, and software stacks. * Industry Focus: Proven track record of engineering and architectural success within the server, data center, or enterprise infrastructure industry. * Specification Ownership: Demonstrated ability to independently produce and maintain highly detailed, production-grade technical specifications. * Customer Facing: Excellent communication and presentation skills, with comfort interfacing directly with sophisticated enterprise customers and technical stakeholders. * Education: B.S., M.S., or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related field. * Technical Breadth: * Silicon: Deep knowledge of SoC design flows, interconnects, and interfaces (PCIe, Ethernet, DRAM, USB). * Board-Level: Hands-on experience with hardware platform design, schematic capture, and lab bring-up tools (oscilloscopes, logic analyzers). * Software: Clear understanding of embedded firmware, RTOS, Linux device drivers, and low-level C/C++ programming. Preferred Qualifications * Active participation in open infrastructure communities like the Open Compute Project (OCP). * Deep understanding of hardware security concepts (cryptographic accelerators, HSM, TPM, Side-Channel attack mitigations). * Experience with BMC firmware architecture (OpenBMC) and server management interfaces (MCTP, NVMe-MI, LTPI). Qualifications * Experience & Education: 10+ years of hardware engineering experience with a leadership track record in server, data center, or semiconductor ecosystems. B.S. or M.S. in Electrical Engineering (EE). * Production Track Record: Proven history of taking complex board designs to high-volume production with excellent yields and resolving field RMA issues. * Hands-on Technical Mastery: Deep, continuous experience with circuit design, schematic capture, laboratory equipment, and platform troubleshooting. * DC-SCM & Ecosystem Expertise: Strong knowledge of OCP DC-SCM standard solutions (DC-SCI interface, form factors) and a solid network across hyperscaler and OEM partners. * Supply Chain Agility: Demonstrated capability to execute rapid hardware redesigns, footprint compatibility strategies, and alternative component sourcing. * Tool & Interface Proficiency: Expert familiarity with Cadence OrCAD/Allegro and server interfaces (PCIe, USB, I2C, SMBus, SPI, UART, USB, MCTP, eSPI, LTPI). * Architecture & Software Knowledge: Solid understanding of modern CPU/GPU architectures and the Linux environment (including Python or Bash scripting). * Communication: Exceptional verbal and written communication skills to articulate hardware-anchored security and supply chain strategy to enterprise stakeholders. ## Description As a Lead System Architect at Axiado, you will define the end-to-end architecture bridging silicon (ASIC/SoC), board-level hardware platforms, and low-level system software/firmware. Leveraging your deep expertise in the server and infrastructure industry, you will translate customer requirements into detailed technical specifications. This high-impact role requires navigating complex hardware/software tradeoffs while collaborating closely with Axiado's engineering teams, customers, standards organizations and ecosystem partners., 1. Architectural Definition & Detailed Specification * Own and author comprehensive, unambiguous system architecture specifications, micro-architectural specs, and/or platform requirement documents. * Define rigorous system-level hardware/software partition boundaries and map out register-level interfaces for hardware blocks and low-level software stacks. * Drive micro-architecture specifications for high-security, AI-driven SoCs, including on-chip interconnects (AXI/AHB), memory hierarchies, and standard I/O interfaces (PCIe, Ethernet, SPI, eSPI, I3C, LTPI). 2. Customer Interfacing & Ecosystem Engagement * Serve as a primary technical point of contact for enterprise and hyperscaler customers to gather, analyze, and scope their next-generation platform security needs. * Present Axiado's system architecture roadmap and technical whitepapers to strategic customers, steering-level partners, and standards committees. * Align Axiado's technology with modern server deployment topologies and open-source standards (such as OCP DC-SCM / DC-SCI). 3. Server Infrastructure & Board-Level Integration * Architect platform-level designs optimized for enterprise server motherboards, baseboard management systems, and cloud data center environments. * Guide hardware and SI/PI engineers on signal integrity, power delivery networks, and thermal/mechanical constraints for modular server building blocks. 4. Software, Firmware & Security Stack Partitioning * Specify secure platform boot flows, Root-of-Trust (RoT) architecture, and Platform Firmware Resiliency (PFR) frameworks. * Collaborate with firmware teams to define interfaces for BMC stacks (OpenBMC), Linux kernels, device drivers, and platform management protocols (MCTP, PLDM, Redfish). ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Prototyping with Hardware and the Web](https://www.wearedevelopers.com/videos/651-prototyping-with-hardware-and-the-web) - [Unleashing the Full Potential of the Arm Architecture – Write Once, Deploy Anywhere](https://www.wearedevelopers.com/videos/940-unleashing-the-full-potential-of-the-arm-architecture-write-once-deploy-anywhere) - [Project Fugu: Extending the web](https://www.wearedevelopers.com/videos/832-project-fugu-extending-the-web) - [Remote Driving on Plant Grounds with State-of-the-Art Cloud Technologies](https://www.wearedevelopers.com/videos/251-remote-driving-on-plant-grounds-with-state-of-the-art-cloud-technologies) - [Possibilities with Web Capabilities](https://www.wearedevelopers.com/videos/1575-possibilities-with-web-capabilities) ## Related Articles - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [What Makes WeAreDevelopers World Congress Different From Every Other Tech Event?](https://www.wearedevelopers.com/magazine/701-what-makes-wearedevelopers-world-congress-different-from-every-other-tech-event) - [Everything a Developer Needs to Know About MCP with Neo4j](https://www.wearedevelopers.com/magazine/604-everything-a-developer-needs-to-know-about-mcp-with-neo4j) - [Events like RSAC Get You CISOs. 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