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# Digital Verification Engineer

- **Company:** Efficient LLC
- **Location:** Austin, United States
- **Experience:** Expert
- **Salary:** $160,000.0 - $210,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Automation of Tests, C++ (Programming Language), Code Coverage, Computer Engineering, Software Debugging, Firmware, Formal Verification, Python (Programming Language), Log Analysis, Reduced Instruction Set Computing, System on a Chip, SystemVerilog, Application Specific Integrated Circuits
- **Published:** September 5, 2026
- **Apply:** https://startup.jobs/senior-digital-verification-engineer-efficient-computer-9849612

## About the Role

* Education: Bachelor's or Master's/PhD degree in Electrical Engineering, Computer Engineering, or a related field.
 * Experience: 10+ years of progressive experience in ASIC/SoC design verification with multiple full cycles of ownership from testbench architecture through tapeout.
 * UVM and SystemVerilog: Expertise in UVM-based testbench architecture and constrained-random verification methodology
 * C/C++ experience for modelling or verification.
 * Coverage Closure: Demonstrated track record of driving functional and code coverage to tapeout sign-off on complex, multi-million-gate SoC/ASIC designs.
 * Debug Skills: Proven ability to debug complex simulation failures.
 * Scripting & Automation: Proficiency in Python for test automation, log analysis, coverage post-processing, and regression flow development.
 * Communication: Ability to clearly communicate verification risk, status and tradeoffs to technical peers and program leadership.

Ways to stand out :

 * Experience in Formal verification (JasperGold or similar).
 * Experience building or using AI Agentic flows for DV.
 * Software/Firmware based testing experience and working with software teams pre-silicon
 * Post-silicon experience
 * SoC Architecture: Understanding and experience in some of the following areas : processors (ARM, RISC-V), interconnects (AMBA AXI/ACE/CHI), memory controllers, DMA engines, interrupt controllers, and standard peripherals.
 * Power aware verification and UPF



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