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# FPGA Engineer (Graduate - Senior)

- **Company:** RedTech Recruitment
- **Location:** Derby, UK
- **Experience:** Starter
- **Contract:** Permanent contract
- **Skills:** Software Debugging, Field-Programmable Gate Array (FPGA), Red Hat Enterprise Linux, Subversion, Systems Architecture, SystemVerilog, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Vivado, ModelSim, Git, Software Version Control, Nvme
- **Published:** September 10, 2026
- **Apply:** https://www.collegerecruiter.com/job/2840602204-fpga-engineer-graduate-senior

## About the Role

* Degree in a relevant STEM field (e.g. Electronics, Electrical, Computer or Communications Engineering).
 * Strong FPGA design fundamentals and VHDL skills; ability to write, test and debug via simulation and on-device.
 * Familiarity with at least one major toolchain (e.g. Vivado, Quartus or Libero) and version control (GIT/SVN/CVS).
 * For experienced candidates: proven end-to-end FPGA delivery, interface definition, TCL scripting, and robust verification approaches (e.g. UVM/OSVVM/ABV).
 * Bonus points for: experience with Xilinx / Intel (Altera) / Microchip devices; ModelSim/QuestaSim; SystemVerilog/Verilog; Layer-2/3 networking, USB 3.2 or NVMe; Red Hat Linux; interest in cryptographic systems.
 * Excellent problem-solving, communication, and time-management; able to work autonomously and collaboratively.

Security & Eligibility

Due to the nature of the projects and this requiring very high level security clearance, you must be a British Citizen, and have lived in the UK consistently for the past decade - you should be happy to gain security clearance before starting.

 * Due to project sensitivities, you must be a British Citizen and able to obtain and maintain DV clearance.

## Description

* Design and develop FPGA modules and subsystems across a range of devices and SoC platforms.
 * Create clean, maintainable RTL (VHDL / Verilog / SystemVerilog); build testbenches and validate via simulation and hardware.
 * Integrate FPGA blocks into wider system architectures; collaborate with software, hardware and verification colleagues.
 * Keep pace with new devices, tooling and methods; champion quality, reliability and best practice.
 * For senior hires: lead work-packages, own interfaces and delivery plans, mentor others, and drive verification strategy.


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