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# Senior FPGA Engineer

- **Company:** Olix Computing
- **Location:** Greater London, UK
- **Experience:** Expert
- **Salary:** £24,000.0
- **Contract:** Permanent contract
- **Skills:** Computer Engineering, Software Debugging, Field-Programmable Gate Array (FPGA), Python (Programming Language), PCI Express, Performance Tuning, Signal Processing, Systems Architecture, Systems Integration, Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Application Specific Integrated Circuits
- **Published:** September 10, 2026
- **Apply:** https://www.collegerecruiter.com/job/2840595442-senior-fpga-engineer

## About the Role

* 5+ years of FPGA design experience, including 3+ years working with high-speed interfaces and signal processing pipelines.
 * Strong experience with PCIe and high-speed transceivers.
 * Solid understanding of precision timing and synchronisation in complex systems.
 * Experience with deterministic networking and time-distribution systems (such as White Rabbit).
 * Experience integrating external memory subsystems.
 * Verification experience using COCOTB, UVVM, or OSVVM.
 * Proficiency in Verilog and/or VHDL.
 * Python and scripting experience.
 * Experience with Xilinx/AMD UltraScale+ or Versal devices.
 * Strong debugging skills across hardware-software boundaries.

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.

## Description

We are seeking an experienced and highly motivated Senior FPGA Engineer to design and implement the control and interface functions of our OTPU system. This role spans production system delivery and advanced hardware prototyping. You will work on high-bandwidth architectures involving high-speed interfaces, precision timing, transceivers, and signal processing pipelines. The position requires close collaboration across FPGA, ASIC, hardware, optical, and software teams., * Design and implement FPGA subsystems and hardware modules for high-performance systems.

 * Develop and optimise high-speed interface subsystems (PCIe Gen4, multi-lane transceivers operating at >25 Gb/s NRZ).
 * Implement and validate link integrity features including BER measurement and error correction (ECC, including SECDED).
 * Develop and integrate memory interfaces as required by system architecture.
 * Contribute to hardware prototyping activities in support of silicon development.
 * Collaborate with software engineers to enable low-level driver development and hardware control.
 * Work with hardware and optical engineers to ensure robust system integration and synchronisation.
 * Implement timing-critical and real-time control logic.
 * Conduct testing, validation, and performance optimisation under demanding operating conditions.
 * Debug complex hardware-software interactions and resolve system-level issues.


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