> Markdown version of [/jobs/ext/2849906-senior-fpga-engineer-with-active-secret-clearance](https://www.wearedevelopers.com/jobs/ext/2849906-senior-fpga-engineer-with-active-secret-clearance). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior FPGA Engineer with Active Secret Clearance - **Company:** Trispoke Managed Services View all jobs - **Location:** Cedar Rapids, IA, United States - **Experience:** Expert - **Salary:** $86,800.0 - $165,200.0 - **Contract:** Temporary to permanent - **Skills:** Agile Methodology, JIRA, Unix, C++ (Programming Language), Software Debugging, Digital Electronics, Perl (Programming Language), Ethernet, Field-Programmable Gate Array (FPGA), PCI Express, Static Timing Analysis, Subversion, SystemVerilog, Toolchain, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Scripting, Application Specific Integrated Circuits, Fpga Hardware, Git, SC Clearance, Software Version Control - **Published:** September 11, 2026 - **Apply:** https://www.careerjet.com/jobad/us2ce6600f19666370f6f116aea6dff5de ## About the Role Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience. An active U.S. government issued Final Secret Security Clearance is required A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas Proficient in VHDL/Verilog for FPGA/ASIC design and implementation. Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero). Strong debugging and troubleshooting skills for FPGA/ASIC systems. Proficiency with revision control concepts and tools (e.g., Git, Subversion), Excellent communication and teamwork skills with the ability to work in a collaborative environment. Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet). Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog) Experience in ASIC / FPGA lab validation using advanced laboratory equipment Experience with Unix, scripting, C/C++, and/or Perl. #FPGA #FPGAEngineer #SeniorFPGAEngineer #FPGADevelopment #FPGA Design #DigitalDesign #ASIC #ASICDesign #VHDL #Verilog #SystemVerilog #Xilinx #AMD #Vivado #Altera #Quartus #Microchip #Libero #DigitalElectronics #HardwareEngineering #EmbeddedSystems #FPGAValidation #FPGAVerification #TimingClosure #PCIe #DDR #Ethernet #Aerospace #Defense #AerospaceJobs #DefenseJobs #EngineeringJobs #SecretClearance #ActiveSecretClearance #USCitizen #CedarRapids #IowaJobs #OnsiteJobs #ContractJobs ## Description Collins Aerospace is seeking a highly skilled and innovative Senior FPGA Engineering Contractor to work with our Applied Research and Technology (ART) Microelectronics Technology team. Your work will contribute to the development of cutting-edge defense solutions across Mission Systems, leveraging your expertise in the design, implementation, verification, and integration of a wide variety of high-performance digital FPGAs. What You Will Do Adhere to all applicable Collins Engineering Development and Quality processes, procedures, instructions and guidelines. Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan. Requirements, design and verification of FPGA solutions Integration of developed FPGA on target hardware units Supporting peer reviews and certification analysis activities Peer reviewing FPGA development artifacts Management of change request and task assignments through Jira ## Related Videos - [How a Small Team Shrank a Microsoft Monorepo by 94%](https://www.wearedevelopers.com/videos/1236-how-a-small-team-shrank-a-microsoft-monorepo-by-94) - [Improving quality with Agentic AI with Rovo Dev and Xray](https://www.wearedevelopers.com/videos/2005-improving-quality-with-agentic-ai-with-rovo-dev-and-xray) - [WeAreDevelopers LIVE - Node and Package Security](https://www.wearedevelopers.com/videos/2138-wearedevelopers-live-node-and-package-security) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Git for Code Reviews](https://www.wearedevelopers.com/videos/429-git-for-code-reviews) - [Security Pitfalls for Software Engineers](https://www.wearedevelopers.com/videos/726-security-pitfalls-for-software-engineers) ## Related Articles - [Where to Find Entry-Level Software Engineering Jobs](https://www.wearedevelopers.com/magazine/397-where-to-find-entry-level-software-engineering-jobs) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [Fully Remote Software Engineer Jobs](https://www.wearedevelopers.com/magazine/447-fully-remote-software-engineer-jobs) - [How Much FAANG Companies Actually Pay Software Engineers in 2025](https://www.wearedevelopers.com/magazine/230-how-much-faang-companies-actually-pay-software-engineers-in-2025) - [The 12 Best Jobs for Software Engineers](https://www.wearedevelopers.com/magazine/401-the-12-best-jobs-for-software-engineers) - [9 Ways to Make Money Hacking](https://www.wearedevelopers.com/magazine/333-9-ways-to-make-money-hacking)