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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # CPU Performance Architect - **Company:** Google LLC - **Location:** Mountain View, CA, United States - **Experience:** Expert - **Salary:** $163,000.0 - $236,000.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Data Analysis, ARM Architecture, Bioinformatics, C++ (Programming Language), Computer Engineering, Device Drivers, Python (Programming Language), Linux Kernel, Scripting, Information Technology - **Published:** September 14, 2026 - **Apply:** https://www.techcareers.com/job.asp?id=3390361472&tx=HT7266TYT&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54 ## About the Role Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area., * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 8 years of experience with performance analysis, microarchitectural bottleneck isolation, and workload characterization. * Experience with C/C++ for architectural modeling and scripting languages (specifically Python) for data analysis and automation frameworks., * Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. * Experience with the ARM instruction set architecture (ISA) and ecosystem. * Experience characterizing and optimizing mobile or client platform power/performance and thermal management states (e.g., DVFS). * Understanding of low-level system software components, including the Linux kernel, device drivers, power management frameworks, and runtimes. ## Description * Lead deep-dive microarchitectural analysis on silicon to isolate and quantify pipeline stalls, memory hierarchy bottlenecks, and instruction-level inefficiencies to drive root-cause resolution. * Design, build, and execute advanced power and performance experiments on physical silicon to rigorously correlate pre-silicon projections with post-silicon reality across general-purpose and AI/ML compute workloads. * Develop and maintain early-stage power and performance models to evaluate complex architectural "what-if" scenarios, driving hardware-software co-optimization. * Partner closely with lead CPU architects and cross-functional teams to define dynamic, realistic power and performance goals for future Google silicon. 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See alsoGoogle's EEO Policy (https://www.google.com/about/careers/applications/eeo/) ,Know your rights: workplace discrimination is illegal (https://careers.google.com/jobs/dist/legal/EEOC_KnowYourRights_10_20.pdf) ,Belonging at Google (https://about.google/belonging/) , andHow we hire (https://careers.google.com/how-we-hire/) . If you have a need that requires accommodation, please let us know by completing ourAccommodations for Applicants form (https://goo.gl/forms/aBt6Pu71i1kzpLHe2) . Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes. Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right. ## Related Videos - [JavaScript? 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