> Markdown version of [/jobs/ext/2912818-design-for-test-engineer-iv](https://www.wearedevelopers.com/jobs/ext/2912818-design-for-test-engineer-iv). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Design For Test Engineer IV - **Company:** Arrow Electronics - **Location:** San Jose, CA, United States - **Salary:** $135,000.0 - $170,000.0 - **Contract:** Permanent contract - **Skills:** Computer-Aided Design, Adobe InDesign, Data Analysis, Software Debugging, Electronic Design Automation, Perl (Programming Language), Field-Programmable Gate Array (FPGA), JSON, Joint Test Action (IEEE Standards), Python (Programming Language), Tcl (Programming Language), Test Data, Scripting, Application Specific Integrated Circuits - **Published:** September 15, 2026 - **Apply:** https://find.jobs/jobs-near-me/apply/ats-redirect/?id=2967891791-2 ## About the Role * Design for Test (DFT) architecture * Scan insertion and ATPGBoundary-scan (JTAG IEEE 1149.x) * Built-In Self-Test (BIST) design * Digital/ASIC/FPGA design * Hardware debug and failure analysis * Test pattern development and validation * Scripting (Python/TCL/Perl) for automation * Statistical yield and test data analysis * Electronic design CAD/EDA tools (Synopsys/Cadence/Mentor) ## Description Arrow Electronics is seeking a Design For Test Engineer IV to develop and optimize DFT strategies for complex electronic systems in our wholesale technology business. You will architect and implement scan, BIST, and boundary-scan structures, create test plans, and drive test coverage across product lifecycles. Collaborating with design, manufacturing, and quality teams, you'll analyze yield data, debug failures, and improve testability and reliability. This role suits an experienced engineer passionate about innovation, automation, and delivering high-quality, manufacturable designs at global scale., * Define and implement DFT strategies for complex electronic products and systems. * Integrate scan, BIST, and boundary-scan structures into ASIC/FPGA and board-level designs. * Develop test plans, patterns, and coverage metrics to ensure product quality and manufacturability. * Collaborate with design, manufacturing, and quality teams to resolve test and yield issues. * Analyze production and characterization data to improve test efficiency and product reliability. * Automate test flows, pattern generation, and data analysis with scripting tools. * Participate in design reviews, providing DFT requirements and feedback to cross-functional teams. * Document DFT methods, test procedures, and best practices for global engineering teams.' ,'pay_type':'Yearly Salary','pay_frequency':'Yearly JSON structure. But ensure valid. Let's correct. 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