> Markdown version of [/jobs/ext/2985601-specialist-fpga-design-engineer](https://www.wearedevelopers.com/jobs/ext/2985601-specialist-fpga-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Specialist FPGA Design Engineer - **Company:** L3Harris Technologies, Inc. - **Location:** Salt Lake City, UT, United States - **Experience:** Experienced - **Contract:** Permanent contract - **Skills:** C Sharp (Programming Language), Software Debugging, Programming Tools, Ethernet, Field-Programmable Gate Array (FPGA), Hardware Design, MATLAB, PCI Express, Software Tools, Universal Asynchronous Receiver/Transmitter, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Serial Peripheral Interface, Application Specific Integrated Circuits, Fpga Hardware, ModelSim, Git, Software Version Control - **Published:** September 18, 2026 - **Apply:** https://www.clearancejobs.com/jobs/9177274/specialist-fpga-design-engineer ## About the Role * Experience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx Vivado / ISE and/or Altera Quartus development tool sets. * Experience in laboratory debug techniques using signal generators, digital oscilloscopes, logic analyzers, BERTS, and other complex measurement devices. * Experience with timing closure in FPGAs. * 4+ years FPGA design experience with Digital Signal Processing designs. * Experience in either VHDL (preferred) or Verilog hardware development languages. Qualifications: * Bachelor's Degree and minimum 4 years of prior relevant experience. Graduate Degree and a minimum of 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experience. Preferred Additional Skills: * Implementation of complex Digital Signal Processing (DSP) algorithms in FPGA devices. Equivalent experience in ASIC devices is also applicable. * Implementation of industry standard interfaces (e.g. 10/100/1000 Ethernet, SPI, UART, SDRAM, DDR3, JESD, PCIe, Ethernet). * FPGA Design using High-speed serial interfaces (3+ Gbps) * Git revision control * C/C++/C# and Matlab/Simulink. ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Leveraging Large Language Models for Legacy Code Translation: Challenges and Solutions](https://www.wearedevelopers.com/videos/1157-leveraging-large-language-models-for-legacy-code-translation-challenges-and-solutions) - [How a Small Team Shrank a Microsoft Monorepo by 94%](https://www.wearedevelopers.com/videos/1236-how-a-small-team-shrank-a-microsoft-monorepo-by-94) - [Quantum Computing for Classical Developers](https://www.wearedevelopers.com/videos/1153-quantum-computing-for-classical-developers) - [Building a hypercar from scratch](https://www.wearedevelopers.com/videos/607-building-a-hypercar-from-scratch) - [Git for Code Reviews](https://www.wearedevelopers.com/videos/429-git-for-code-reviews) ## Related Articles - [Top 6 Hackathons for Developers in 2023](https://www.wearedevelopers.com/magazine/263-top-6-hackathons-for-developers-in-2023) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [9 Ways to Make Money Hacking](https://www.wearedevelopers.com/magazine/333-9-ways-to-make-money-hacking) - [Software Engineer Salary London](https://www.wearedevelopers.com/magazine/252-software-engineer-salary-london) - [Data Engineer Salary UK](https://www.wearedevelopers.com/magazine/253-data-engineer-salary-uk) - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again)