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# Digital Design Engineer

- **Company:** Vivid Resourcing
- **Location:** Leuven, Belgium
- **Contract:** Permanent contract
- **Skills:** Systems Engineering, Computer Engineering, Software Debugging, Digital Arts, Logic Synthesis of Circuits, Electronic Design Automation, Field-Programmable Gate Array (FPGA), Hardware Design, Static Timing Analysis, SystemVerilog, Verilog, Application Specific Integrated Circuits
- **Published:** September 22, 2026
- **Apply:** https://www.adzuna.be/details/5893103401

## About the Role

* Degree in Electrical Engineering, Electronics Engineering, Computer Engineering or a related field.
 * Professional experience in digital ASIC design, with a strong focus on RTL development.
 * Strong knowledge of Verilog and/or SystemVerilog.
 * Good understanding of digital design principles, RTL coding and synchronous design.
 * Experience with ASIC development flows, including simulation, synthesis and timing analysis.
 * Familiarity with RTL verification and common simulation/EDA tools.
 * Ability to work from technical specifications and contribute to architectural discussions.
 * Strong analytical and problem-solving skills.
 * Experience working in multidisciplinary hardware development teams.

## Description

We're current recruiting for a Digital Design Engineer to join an experienced hardware development team.

In this role, you will be involved throughout the digital ASIC development lifecycle, from architecture and RTL design through to verification, synthesis and implementation.

You will work closely with other digital, analogue, verification and systems engineers to develop robust, high-performance ASIC solutions.

The position offers the opportunity to take ownership of complex digital design blocks while contributing to the development of next-generation semiconductor products., * Design and develop digital ASICs from specification and architecture through to implementation.

 * Develop high-quality, synthesizable RTL using Verilog or SystemVerilog.
 * Translate functional and architectural requirements into efficient digital designs.
 * Work closely with verification engineers to ensure robust design validation.
 * Support simulation, debugging, synthesis and timing analysis.
 * Contribute to design reviews and technical decisions across the ASIC development process.
 * Analyse and resolve design issues at RTL and gate level.
 * Collaborate with analogue, mixed-signal, FPGA and systems teams where required.
 * Contribute to improving design methodologies, coding standards and development processes.


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