> Markdown version of [/jobs/ext/3028317-development-test-engineer-pre-post-silicon-software-test](https://www.wearedevelopers.com/jobs/ext/3028317-development-test-engineer-pre-post-silicon-software-test). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Development Test Engineer - Pre & Post-Silicon Software Test - **Company:** Moore's Law - **Location:** San Jose, CA, United States - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Data Analysis, Automation of Tests, CMake, Computer Engineering, Continuous Integration, Firmware, GNU Compiler Collection, Hardware-In-The-Loop Simulation, Joint Test Action (IEEE Standards), Python (Programming Language), Machine Learning, PCI Express, Microsoft PowerPoint, Software Systems, System Software, Test Data, Universal Asynchronous Receiver/Transmitter, AI Infrastructure, Serial Peripheral Interface, Git, Information Technology, Bare Metal - **Published:** September 22, 2026 - **Apply:** https://startup.jobs/senior-development-test-engineer-pre-post-silicon-software-test-validation-and-characterization-tylsemi-10144540 ## About the Role If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits., * Experience: 8-10+ years in post-silicon validation, system software testing, silicon bring-up, or development test for complex SoCs / ASICs / GPUs. * Software/Firmware Skills: Advanced proficiency in C and Python for low-level bare-metal test content, hardware abstraction, and automation frameworks. * Silicon Characterization: Proven experience with Shmoo plotting PVT corner testing, jitter/margin analysis, and guard-band definition. * Fault Injection Expertise: Hands-on experience building or executing error-injection and recovery validation campaigns on production silicon. * Lab Instrumentation: Fluency with oscilloscopes, protocol analyzers (PCIe/CXL), logic analyzers, BERTs, thermal chambers, controllable power supplies, and JTAG debuggers. * High-Speed & System Protocols: Practical, protocol-level understanding of high-speed serial interfaces (PCIe, CXL, or UCIe) and control buses (I2C, SPI, UART, PMBus, SMBus). * Power Systems: Solid grasp of system power delivery-including sequencing, PMIC telemetry, DVFS, voltage regulation, and protection trip limits. * Data & Tooling: Competency with toolchains (Git, CMake, GCC/Clang, CI pipelines) and statistics/data analysis over test populations. * Education: BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience. * AI Tool usage : AI coding and automation tool is must for this role ## Description There are no layers, no approval chains, no corporate theater. * If you have an idea, we test it. If it works, we ship it. * No endless meetings, no PowerPoint presentations to convince middle management., We are seeking an experienced to own the end-to-end testing, characterization, and failure analysis strategy for complex, next-generation multi-die packages. You will own the complete validation lifecycle across a multi-die architecture-covering high-speed die-to-die (UCIe) interconnects, Power Delivery Networks (PDN/PMIC), Platform Management Controllers (PMC), PCIe/CXL subsystems. Additionally, you will apply statistical analysis and machine learning to test data-driving outlier detection, bench-to-ATE correlation, and predictive telemetry signals-without treating ML models as a substitute for true physical root-cause analysis. What you'll do Test content and automation * Test Plan Ownership: Define development test strategies, coverage targets, content architecture, and strict traceability from architectural requirements to validation evidence. * Bare-Metal & C/Python Test Content: Write low-level C and Python test suites-including bare-metal exercisers, traffic generators, stress patterns, and custom firmware drivers/hooks. * Scalable Automation & HIL: Build robust test frameworks featuring instrument control, automated sequencing, structured result capture, and Hardware-in-the-Loop (HIL) CI/CD integration for continuous validation. * Bench-to-ATE Handoff: Develop lab-to-ATE correlation test suites and drive smooth handoffs to Product & Test Engineering (PTE) * Own the development test plan: coverage goals, content architecture, and the traceability between a requirement, the test that exercises it, and the evidence it passed. Characterization and margin * Injection Frameworks: Build minimally invasive fault-injection hardware/software infrastructure that perturbs target datapaths without destabilizing the test setup itself. * Protocol & Platform Fault Testing: Execute rigorous error campaigns targeting CRC retries, lane degradation/repair, sideband timeouts, PCIe AER, DMA/IOMMU translation faults, and PMIC reset conditions. * Firmware & Resilience Testing: Validate system firmware error handlers, watchdog timers, and hardware-level fault containment behavior under out-of-spec conditions. ## Related Videos - [Code to Road in < 12 hours](https://www.wearedevelopers.com/videos/1082-code-to-road-in-12-hours) - [How a Small Team Shrank a Microsoft Monorepo by 94%](https://www.wearedevelopers.com/videos/1236-how-a-small-team-shrank-a-microsoft-monorepo-by-94) - [Playing Pong on a shoulder press machine](https://www.wearedevelopers.com/videos/100140-playing-pong-on-a-shoulder-press-machine) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Git for Code Reviews](https://www.wearedevelopers.com/videos/429-git-for-code-reviews) - [How will artificial intelligence change the future of software testing?](https://www.wearedevelopers.com/videos/85-how-will-artificial-intelligence-change-the-future-of-software-testing) ## Related Articles - [The 8 Best Code Testing Tools](https://www.wearedevelopers.com/magazine/402-the-8-best-code-testing-tools) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Should senior developers refuse interview coding challenges?](https://www.wearedevelopers.com/magazine/29-should-senior-developers-refuse-interview-coding-challenges) - [How to Become an AI Engineer](https://www.wearedevelopers.com/magazine/331-how-to-become-an-ai-engineer) - [How software is steering vehicle technology](https://www.wearedevelopers.com/magazine/515-how-software-is-steering-vehicle-technology) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated)