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# Software Engineer - Ultra Low Latency Risk Engine Developer

- **Company:** Citigroup Inc.
- **Location:** London, UK (Remote available)
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Java (Programming Language), Agile Methodology, Artificial Intelligence, Algorithmic Trading, Automation of Tests, C++ (Programming Language), Software Quality, Continuous Delivery, Continuous Integration, Data Structures, Programming Tools, Memory Management, IBM Rational Unified Process, Java Virtual Machine (JVM), Linux Kernel, Performance Tuning, Scrum Methodology, Systems Development Life Cycle, Remote Direct Memory Access, Regression Testing, Risk Management Information Systems, Software Engineering, Working Model 2D, Multithreading, Test-Driven Development (TDD), Delivery Pipeline, Concurrency, Core Api, Event Driven Architecture, Low Latency
- **Published:** September 24, 2026
- **Apply:** https://citi.wd5.myworkdayjobs.com/2/job/London--United-Kingdom/Senior-Software-Engineer---Ultra-Low-Latency-Risk-Engine-Developer---_26996794/apply

## About the Role

* Extensive software engineering experience, with substantial hands-on experience building risk management, position-keeping, or other latency-critical systems for cash equities electronic trading or algorithmic trading platforms at a global investment bank or equivalent financial institution.
 * Strong, hands-on technical expertise in Low Latency Java and/or C++ (Rust a plus), including multi-threading, concurrency, lock-free data structures, Java NIO, and JVM/GC performance tuning.
 * Hands-on experience with low-latency messaging and IPC frameworks such as Aeron, Solace, or equivalent shared-memory/IPC technologies for building distributed, high-throughput trading systems.
 * Demonstrated background in real-time distributed risk management systems for cash equities flow products, including asynchronous, event-driven architectures.
 * Practical, hands-on experience with NUMA-aware design, CPU core pinning/affinity and isolation, Linux kernel/OS tuning, and low-latency networking (kernel bypass, RDMA, or specialized NIC tuning) for ultra low-latency, high-throughput systems.
 * Strong understanding of automated testing techniques, test-driven development, and quality engineering practices for mission-critical systems.
 * Solid grounding in Agile/Scrum methodologies, Rational Unified Process, and Continuous Integration/Continuous Delivery pipelines.
 * Deep familiarity with low-latency system design principles: performance optimization, concurrency, high-throughput architecture, and jitter elimination.
 * Demonstrated leadership experience managing or technically leading engineering teams (onshore and/or offshore) delivering high-performance trading systems.
 * Excellent communication skills, with the ability to present and grasp complex technical and risk concepts in a multicultural, cross-regional environment, and to work effectively with globally distributed stakeholders (trading desks, quants, infrastructure, and support teams).
 * Working knowledge of regional exchange microstructure and relevant regulatory regimes governing cash equities electronic trading and risk controls.

## Description

The engineer will own critical, latency-sensitive risk-checking components that sit directly in the cash equities trading hot path, ensuring pre-trade and real-time risk controls are enforced with microsecond-level performance while maintaining correctness and resiliency at scale. This is a hands-on, deeply technical role that also carries leadership responsibilities - mentoring engineers, driving architecture decisions, and coordinating delivery across global development centers.

The person will collaborate closely with product development, quantitative research, technology infrastructure, production support, and QA teams, with close alignment to global strategy and cross-regional delivery (APAC, EMEA, NAM).

Risk Engine & Core Development

 * Design, develop, and maintain the ultra-low-latency, in-line Risk Engine responsible for real-time pre-trade risk checks, position limits, and exposure controls across cash equities electronic execution flows.
 * Architect and optimize high-performance, lock-minimal, multi-threaded components capable of processing risk decisions in the sub-microsecond to low-microsecond range.
 * Integrate risk and position components with Client Connectivity, Market Access layers, and high-throughput market data feed handlers.
 * Design and implement low-latency messaging and IPC architectures using technologies such as Aeron and Solace, along with shared-memory/IPC mechanisms, to enable fast, reliable communication between distributed risk, execution, and position components.
 * Apply deep expertise in JVM performance tuning, memory management, garbage collection avoidance, and/or native (C++/Rust) performance engineering to eliminate latency outliers ("jitter") in the risk path.
 * Perform system-level performance tuning including NUMA-aware application design and memory allocation, CPU core isolation/pinning and affinity tuning, interrupt/IRQ tuning, and kernel bypass or low-latency networking techniques (e.g., kernel bypass stacks, RDMA, solarflare/onload-style NIC tuning) to minimize end-to-end latency and jitter across the risk and execution path.

Product & Cross-Functional Collaboration

 * Partner with cash equities traders, quantitative researchers, and clients to translate risk, exposure, and control requirements into robust engineering designs.
 * Work with market access teams to ensure risk checks are correctly and efficiently embedded across order lifecycle events (new, amend, cancel) and multiple execution venues.
 * Support new liquidity source onboarding and DMA capability enhancements from a risk-controls perspective.

Testing & Quality Engineering

 * Build and continuously improve deterministic, repeatable testing frameworks (unit, integration, latency/performance, and chaos/failover testing) tailored to ultra-low-latency risk systems.
 * Champion test-driven development (TDD) practices for mission-critical, heavily multi-threaded, asynchronous components.
 * Establish performance benchmarking and latency regression testing - including messaging, network, CPU, and memory subsystem profiling - as part of the standard delivery pipeline.

AI-Powered SDLC

 * Leverage Citi's suite of AI-powered development tools across the SDLC to improve engineering productivity, code quality, and time-to-market for risk engine enhancements.

Agile & CI/CD

 * Champion Agile/Scrum practices and Rational Unified Process disciplines suited to complex, mission-critical trading systems.
 * Drive CI/CD adoption with a shift-left testing philosophy, enabling accelerated, low-risk release cycles for latency-sensitive production systems.

Platform Support & Enhancement:

 * Build and maintain tooling for trading platform monitoring, real-time risk/position reconciliation, application recovery, and disaster-recovery/failover for the Risk Engine.
 * Provide senior-level production support escalation for latency and risk-control incidents, including root-cause analysis of performance regressions across application, messaging, OS, and hardware layers.

Leadership:

 * Lead and mentor a team of engineers across onshore/offshore locations and Drive architectural decisions and technical roadmap for the Risk Engine and related low-latency components, in alignment with global cash equities electronic trading strategy.


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