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# Senior FPGA Architect (Compute Test, North Reading)

- **Company:** Teradyne Inc.
- **Location:** North Reading, MA, United States
- **Experience:** Expert
- **Salary:** $154,900.0 - $247,800.0
- **Contract:** Permanent contract
- **Skills:** Systems Engineering, Software Debugging, Logic Synthesis of Circuits, Formal Verification, Field-Programmable Gate Array (FPGA), Joint Test Action (IEEE Standards), Python (Programming Language), PCI Express, Performance Tuning, Software Requirements Analysis, SystemVerilog, Tcl (Programming Language), Strategies of Testing, Verilog, Scripting, Software Version Control
- **Published:** September 24, 2026
- **Apply:** https://www.techcareers.com/job.asp?id=3402947840&tx=HT7367TTZ&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

* 8+ years of hands-on experience in FPGA design and development
 * Deep expertise in Verilog/SystemVerilog for design and debugging
 * Proven experience with AMD (Xilinx) and/or Intel FPGA toolchains, including synthesis, implementation, and timing closure
 * Strong understanding of digital design fundamentals and ability to interpret schematics
 * Experience with high-speed interfaces such as PCIe, DDR, SerDes, or similar
 * Demonstrated ability to bring up and debug FPGA designs on hardware platforms
 * Experience with protocols such as AXI4, USB, I2C, SPI
 * Scripting proficiency (TCL, Python) for automation and tooling
 * Experience with version control systems and collaborative development workflows

Nice-to-Have

 * Experience with SystemVerilog-based verification methodologies (UVM or similar)
 * Familiarity with FPGA SoCs and embedded processor subsystems

What Sets You Apart

 * Strong system-level thinking and ability to debug across FPGA, board, and software boundaries
 * Ability to balance architectural decisions with implementation constraints
 * Excellent communication and collaboration skills in cross-functional environments

## Description

* Drive FPGA design from architecture through implementation and bring-up, including requirements definition and trade-off analysis
 * Architect and implement high-performance FPGA solutions involving complex interfaces and subsystem integration
 * Partner closely with hardware, software, and system engineering teams to deliver cohesive system-level solutions
 * Lead timing closure, resource optimization, and performance tuning for advanced FPGA designs
 * Define and execute validation strategies, including lab bring-up, debug, and root cause analysis using JTAG and lab instrumentation
 * Contribute to PCB and system design decisions impacting FPGA performance and integration
 * Develop automation and debug tools using scripting (TCL, Python) to improve design and validation workflows


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