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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA Developer (Compute Test, North Reading) - **Company:** Teradyne Inc. - **Location:** North Reading, MA, United States - **Experience:** Expert - **Salary:** $123,100.0 - $196,900.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Code Coverage, Software Debugging, Logic Synthesis of Circuits, Digital Technology, Flash Memory, Formal Verification, Field-Programmable Gate Array (FPGA), Joint Test Action (IEEE Standards), Python (Programming Language), PCI Express, Performance Tuning, Signal Integrity, Systems Architecture, SystemVerilog, Tcl (Programming Language), Verilog, Scripting, Software Version Control - **Published:** September 25, 2026 - **Apply:** https://jobs.teradyne.com/talentcommunity/apply/1433744200/?locale=en_US ## About the Role We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position. * 5+ years of hands-on experience in FPGA design and development. * Strong expertise in Verilog/SystemVerilog for design and debugging. * Proven experience with AMD (Xilinx) and/or Intel FPGA toolchains, including synthesis, implementation, and timing closure. * Strong understanding of digital design fundamentals and the ability to interpret schematics. * Experience with high-speed interfaces such as PCIe, DDR, SerDes, or similar technologies and with protocols such as AXI4, USB, I2C, and SPI. * Demonstrated ability to bring up and debug FPGA designs on hardware platforms. * Scripting proficiency in TCL and Python for automation and tooling, plus experience with version control systems and collaborative development workflows. * Strong system-level thinking, sound architectural judgment, and the ability to debug across FPGA, board, and software boundaries while balancing architectural decisions with implementation constraints. * Excellent communication, collaboration, technical guidance, and mentoring skills in cross-functional environments. * Preferred: experience with SystemVerilog-based verification methodologies such as UVM; FPGA SoCs and embedded processor subsystems; ATE or measurement equipment design; signal integrity, high-speed serial interfaces, and transceivers; DDR, HBM, and Flash memory technologies; or AI tools for engineering design. ## Description Teradyne's Compute Test Division develops advanced test solutions for next-generation silicon, including high-performance SoCs and accelerators powering modern compute and AI systems. We are seeking a Staff FPGA Engineer to design and deliver high-performance FPGA-based solutions at the heart of our test platforms. This role works at the intersection of FPGA design, board-level hardware, and system architecture to solve complex challenges involving high-speed interfaces, large digital systems, tight timing margins, and system-level constraints. Based on site in North Reading, Massachusetts, the position is expected to work in the office three days per week and collaborate across functions to deliver robust, scalable solutions that directly affect the quality and performance of cutting-edge semiconductor devices. * Lead FPGA solutions from requirements through implementation and bring-up. * Develop high-performance FPGA logic involving complex interfaces and subsystem integration, along with automation and debug tools using TCL and Python. * Collaborate with hardware, software, systems, and design verification teams to deliver cohesive system-level solutions and achieve appropriate simulation and test coverage. * Support timing closure, resource optimization, performance tuning, lab bring-up, debugging, and root cause analysis using JTAG and lab instrumentation. * Partner on PCB and system design decisions that affect FPGA performance and integration. * Mentor less experienced engineers and provide technical guidance across the team. ## Related Videos - [JavaScript? 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