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# Software Dev Engineer III

- **Company:** Amazon.com, Inc.
- **Location:** Redmond, WA, United States
- **Experience:** Experienced
- **Salary:** $149,760.0 - $160,160.0
- **Contract:** Temporary contract
- **Skills:** C++ (Programming Language), Software Debugging, Embedded Software, Python (Programming Language), Toolchain, Vivado, Yocto
- **Published:** September 26, 2026
- **Apply:** https://www.careerjet.com/jobad/us1df4a7fd359d13f488db67f2b58e508d

## About the Role

* 3+ years of experience in embedded software development
 * Experience with hands-on Versal bring-up
 * Experience with Yocto and the AMD/Xilinx SDK toolchain
 * Experience with C/C++ and Python or Rust
 * Experience with hardware and software debugging
 * Detailed understanding of the Versal boot architecture

Purpose of the Team and key projects:

 * The position supports Kuiper's Gen 2 satellite development, specifically working on architecture changes for hardware modules.

Top 3 Must Have Hard Skills:

 * The position requires 3+ years of embedded software development experience with hands-on vessel bring-up expertise.
 * Essential technical skills include experience with Yocto and AMD/Xilinx SDK tool chain, proficiency in C/C++ (Python or Rust as additional languages), and hardware/software debugging capabilities.
 * Candidates should have detailed understanding of vessel boot architecture, though some flexibility exists on this requirement.

Nice to haves:

 * Candidates can come from various industries including space, defense, or any devices industry, as the required SOC expertise spans multiple sectors beyond aerospac
 * Leadership Principles

Leadership Principles:

 * Bias for Action, Frugality, Earn Trust, Dive Deep, Have Backbone; Disagree and Commit, Deliver Results.

## Description

* Bring up the AMD Versal SoC on our custom board, using the EVK as the reference design
 * Develop the BSP and drivers for Versal PS subsystems (APU and RPU)
 * Validate PL integration and peripherals, including IP instantiation, configuration, and AXI interfaces
 * Work with AMD and Xilinx on Versal platform tools (Vivado, Vitis, Yocto, and EDF)
 * Migrate Vivado toolchain from v2024.2 to v2026.1/v2026.2