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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Engineer, Digital Design Engineering - **Company:** Analog Devices - **Location:** Alicante (Alacant), Spain - **Contract:** Permanent contract - **Skills:** Adobe InDesign, C++ (Programming Language), Communications Protocols, Computer Programming, Computer Networks, Software Debugging, Programming Tools, Logic Synthesis of Circuits, Digital Technology, Embedded Software, Ethernet, Field-Programmable Gate Array (FPGA), Python (Programming Language), Static Timing Analysis, System Testing, SystemVerilog, Tcl (Programming Language), Strategies of Testing, Universal Asynchronous Receiver/Transmitter, Verilog - **Published:** September 27, 2026 - **Apply:** https://www.buscojobs.com.es/engineer-digital-design-engineering-en-alicante-ID-372720189 ## About the Role You'll work in a collaborative environment that values clear design trade-offs and continuous learning, with a clear path to growing technical impact.Compensaciones / Beneficios - Collaborate with cross-functional teams to define requirements, architecture, and design specifications - Architect, design, implement, and maintain RTL IP and digital systems using Verilog/SystemVerilog - Optimize design performance, power, and area (PPA) - Run and support simulation, synthesis, and timing analysis for RTL IP - Work with verification engineers on test strategies and debugging - Participate in design and architecture reviews and trade-off decisions - Improve workflows, tools, and methodologies for IP development and integration - Support embedded firmware development, debugging, and bring-up activities as neededResponsabilidades - Verilog and/or SystemVerilog experience in a digital design environment - Programming experience in one or more languages (C/C++, Python, TCL) - Understanding of on-chip communication protocols such as SPI, I2C, or UART - Exposure to FPGA emulation or pre-silicon system validation - Familiarity with Ethernet or networking concepts - Exposure to timing, power, or area optimization in design closure - Exposure to microcontroller-based subsystems and development tools - Familiarity with a requirements-driven design flow - Knowledge of automotive or safety-critical design flows (ISO*****) is a plus - Awareness of security/encryption techniques in embedded systemsRequisitos principales - ## Description Experteer Overview As a Digital Design Engineer in Analog Devices' Automotive Networking team in Valencia, you will develop RTL IP and digital systems using Verilog/SystemVerilog to enable high-performance automotive networking solutions.You will collaborate across disciplines to define requirements, optimize architecture, and drive PPA improvements while supporting verification and embedded firmware tasks.The role offers exposure to safety-critical automotive flows and pre-silicon validation, contributing to impactful, real-world technology.You'll work in a collaborative environment that values clear design trade-offs and continuous learning, with a clear path to growing technical impact.Compensaciones / Beneficios - Collaborate with cross-functional teams to define requirements, architecture, and design specifications - Architect, design, implement, and maintain RTL IP and digital systems using Verilog/SystemVerilog - Optimize design performance, power, and area (PPA) - Run and support simulation, synthesis, and timing analysis for RTL IP - Work with verification engineers on test strategies and debugging - Participate in design and architecture reviews and trade-off decisions - Improve workflows, tools, and methodologies for IP development and integration - Support embedded firmware development, debugging, and bring-up activities as neededResponsabilidades - Verilog and/or SystemVerilog experience in a digital design environment - Programming experience in one or more languages (C/C++, Python, TCL) - Understanding of on-chip communication protocols such as SPI, I2C, or UART - Exposure to FPGA emulation or pre-silicon system validation - Familiarity with Ethernet or networking concepts - Exposure to timing, power, or area optimization in design closure - Exposure to microcontroller-based subsystems and development tools - Familiarity with a requirements-driven design flow - Knowledge of automotive or safety-critical design flows (ISO*****) is a plus - Awareness of security/encryption techniques in embedded systemsRequisitos principales - ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [The Gashlycrumb Tinies of AI Networking You Must Know (or Languish!)](https://www.wearedevelopers.com/videos/2067-the-gashlycrumb-tinies-of-ai-networking-you-must-know-or-languish) - [Building a hypercar from scratch](https://www.wearedevelopers.com/videos/607-building-a-hypercar-from-scratch) - [Agile work at CARIAD – Creating a customer web application for controlling the vehicle ](https://www.wearedevelopers.com/videos/200-agile-work-at-cariad-creating-a-customer-web-application-for-controlling-the-vehicle) - [Docker network without Docker](https://www.wearedevelopers.com/videos/1418-docker-network-without-docker) - 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