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# Digital Asic Design Engineer - Barcelona

- **Company:** Intellectual Capital Resources
- **Location:** Madrid, Spain
- **Contract:** Permanent contract
- **Skills:** C++ (Programming Language), Microarchitecture, Logic Synthesis of Circuits, Field-Programmable Gate Array (FPGA), Machine Learning, PCI Express, Reduced Instruction Set Computing, Verification and Validation (Software), System on a Chip, Application Specific Integrated Circuits
- **Published:** September 29, 2026
- **Apply:** https://www.buscojobs.com.es/digital-asic-design-engineer-barcelona-en-madrid-ID-373427845

## About the Role

visa sponsorship and relocation support Contribute to digital IC/ASIC/FPGA designs for advanced technology nodes Develop or integrate RISC-V designs and CPU architecture components Work on PCIe protocols and related interfaces Leverage UVM environments for verification and validation Collaborate on IP/SOC design across cross-functional teams Contribute to scalable digital design methodologies and architecture decisions 5+ years of ASIC/FPGA design experience Experience with UVM environments and processes Knowledge of RISC-V/CPU/GPU is a plus PCIe knowledge is a plus Visa sponsorship and relocation support available depending on experience/qualifications Degree in Electronics / Microelectronics or similar field UVM RISC-V C/C++ Digital ASIC Design Engineer - barcelona barcelona, catalunya, es
#J-*****-Ljbffr

## Description

In this role you will contribute to digital design efforts for cutting-edge semiconductor technology.You will work on advanced technology nodes and take ownership of RISC-V designs, CPU architecture components, PCIe protocols, and machine learning accelerators.You will operate within UVM-enabled environments to deliver high-quality IP and SOC blocks.This position offers sponsorship/relocation options for the right candidate and a pathway to influence next-generation digital ICs.visa sponsorship and relocation support Contribute to digital IC/ASIC/FPGA designs for advanced technology nodes Develop or integrate RISC-V designs and CPU architecture components Work on PCIe protocols and related interfaces Leverage UVM environments for verification and validation Collaborate on IP/SOC design across cross-functional teams Contribute to scalable digital design methodologies and architecture decisions 5+ years of ASIC/FPGA design experience Experience with UVM environments and processes Knowledge of RISC-V/CPU/GPU is a plus PCIe knowledge is a plus Visa sponsorship and relocation support available depending on experience/qualifications Degree in Electronics / Microelectronics or similar field UVM RISC-V C/C++ Digital ASIC Design Engineer - barcelona barcelona, catalunya, es#J-*****-Ljbffr