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# FPGA Engineer

- **Company:** Logiicdev
- **Location:** Graz, Austria
- **Experience:** Experienced
- **Salary:** €39,774.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Software Debugging, Logic Synthesis of Circuits, Ethernet, Field-Programmable Gate Array (FPGA), Sensor Fusion, Signal Processing, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Application Specific Integrated Circuits
- **Published:** September 1, 2026
- **Apply:** https://europa.eu/eures/portal/jv-se/jv-details/MTcxMTc4OTQgNDM?lang=en

## About the Role

* Bachelor's or Master's degree in Electrical Engineering, Electronics, or related field

 * Strong 2-3 years' experience with Verilog/SystemVerilog or VHDL

 * Solid knowledge of digital design fundamentals

 * Experience with sensor interfaces (SPI, I²C, LVDS, MIPI, Ethernet, etc.)

 * Familiarity with FPGA tools (Vivado/Vitis, Quartus)

 * Expertise in RTL Design and Debugging

 * Strong analytical and problem-solving skills

Note for Austria according to §9 Abs. 2 GlBG: The minimum salary according to IT-KV is €2841

## Description

The FPGA Engineer will work on designing and verifying FPGA architectures for sensor data acquisition and processing, implementing real-time signal processing and sensor fusion pipelines, developing and optimising AI/ML accelerators on FPGA, collaborating with algorithm and system teams to translate models into hardware prototype designs on FPGA and preparing ASIC-oriented RTL debug, validating, and documenting hardware designs


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